Electronic Components Datasheet Search |
|
DS21Q55 Datasheet(PDF) 2 Page - List of Unclassifed Manufacturers |
|
DS21Q55 Datasheet(HTML) 2 Page - List of Unclassifed Manufacturers |
2 / 237 page DS21Q55 Quad T1/E1/J1 Transceiver 2 of 237 TABLE OF CONTENTS 1. MAIN FEATURES .........................................................................................................................9 1.1 FUNCTIONAL DESCRIPTION...................................................................................12 1.2 BLOCK DIAGRAM .................................................................................................14 2. PIN FUNCTION DESCRIPTION ..................................................................................................18 2.1.1 Transmit Side.............................................................................................18 2.1.2 Receive Side..............................................................................................21 2.2 PARALLEL CONTROL PORT PINS...........................................................................24 2.3 EXTENDED SYSTEM INFORMATION BUS.................................................................25 2.4 JTAG TEST ACCESS PORT PINS ..........................................................................26 2.5 LINE INTERFACE PINS ..........................................................................................27 2.6 SUPPLY PINS.......................................................................................................28 2.7 PINOUT ...............................................................................................................29 2.8 PACKAGE ............................................................................................................35 3. PARALLEL PORT.......................................................................................................................36 3.1 REGISTER MAP....................................................................................................36 4. SPECIAL PER-CHANNEL REGISTER OPERATION .................................................................43 5. PROGRAMMING MODEL ...........................................................................................................45 5.1 POWER-UP SEQUENCE ........................................................................................46 5.1.1 Master Mode Register ................................................................................46 5.2 INTERRUPT HANDLING .........................................................................................47 5.3 STATUS REGISTERS.............................................................................................47 5.4 INFORMATION REGISTERS ....................................................................................48 5.5 INTERRUPT INFORMATION REGISTERS...................................................................48 6. CLOCK MAP ...............................................................................................................................49 7. T1 FRAMER/FORMATTER CONTROL AND STATUS REGISTERS..........................................50 7.1 T1 CONTROL REGISTERS.....................................................................................50 7.2 T1 TRANSMIT TRANSPARENCY .............................................................................55 7.3 AIS-CI AND RAI-CI GENERATION AND DETECTION ................................................55 7.4 T1 RECEIVE-SIDE DIGITAL-MILLIWATT CODE GENERATION ....................................56 8. E1 FRAMER/FORMATTER CONTROL AND STATUS REGISTERS .........................................59 8.1 E1 CONTROL REGISTERS.....................................................................................59 8.2 AUTOMATIC ALARM GENERATION .........................................................................63 8.3 E1 INFORMATION REGISTERS...............................................................................64 9. COMMON CONTROL AND STATUS REGISTERS ....................................................................66 9.1 T1/E1 STATUS REGISTERS ..................................................................................67 10. I/O PIN CONFIGURATION OPTIONS .........................................................................................73 11. LOOPBACK CONFIGURATION .................................................................................................75 11.1 PER-CHANNEL LOOPBACK................................................................................77 12. ERROR COUNT REGISTERS.....................................................................................................79 12.1 LINE-CODE VIOLATION COUNT REGISTER (LCVCR) ..........................................80 |
Similar Part No. - DS21Q55 |
|
Similar Description - DS21Q55 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |