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AD7982 Datasheet(PDF) 19 Page - Analog Devices

Part No. AD7982
Description  18-Bit, 1 MSPS PulSAR 7 mW ADC in MSOP/LFCSP
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
Logo AD - Analog Devices

AD7982 Datasheet(HTML) 19 Page - Analog Devices

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AD7982
Data Sheet
Rev. D | Page 18 of 25
CS MODE, 3-WIRE WITHOUT BUSY INDICATOR
CS mode, 3-wire without busy indicator is usually used when a
single AD7982 is connected to an SPI-compatible digital host.
The connection diagram is shown in Figure 29, and the
corresponding timing is given in Figure 30.
With SDI tied to VIO, a rising edge on CNV initiates a
conversion, selects the CS mode, and forces SDO to high
impedance. After a conversion is initiated, it continues until
completion irrespective of the state of CNV. This feature can be
useful, for instance, to bring CNV low to select other SPI
devices, such as analog multiplexers; however, CNV must be
returned high before the minimum conversion time elapses and
then held high for the maximum possible conversion time to
avoid the generation of the busy signal indicator.
When the conversion completes, the AD7982 enters the
acquisition phase and powers down. When CNV goes low, the
MSB is output onto SDO. The remaining data bits are clocked by
subsequent SCK falling edges. The data is valid on both SCK
edges. Although the rising edge can capture the data, a digital
host using the SCK falling edge allows a faster reading rate,
provided it has an acceptable hold time. After the 18th SCK
falling edge or when CNV goes high (whichever occurs first),
SDO returns to high impedance.
AD7982
SDI
SDO
CNV
SCK
CONVERT
DATA IN
CLK
DIGITAL HOST
VIO
Figure 29. CS Mode, 3-Wire Without Busy Indicator Connection Diagram (SDI High)
SDO
D17
D16
D15
D1
D0
tDIS
SCK
12
3
16
17
18
tSCK
tSCKL
tSCKH
tHSDO
tDSDO
CNV
CONVERSION
ACQUISITION
tCONV
tCYC
ACQUISITION
SDI = 1
tCNVH
tACQ
tEN
Figure 30. CS Mode, 3-Wire Without Busy Indicator Serial Interface Timing (SDI High)


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