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AD7264BCPZ Datasheet(PDF) 18 Page - Analog Devices

Part No. AD7264BCPZ
Description  1 MSPS, 14-Bit, Simultaneous Sampling SAR ADC
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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AD7264BCPZ Datasheet(HTML) 18 Page - Analog Devices

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Data Sheet
AD7264
Rev. D | Page 17 of 29
to power up and charge the 1 μF decoupling capacitor during
the power-up time.
TYPICAL CONNECTION DIAGRAMS
Figure 26 and Figure 27 are typical connection diagrams for the
AD7264. In these configurations, the AGND pin is connected
to the analog ground plane of the system, and the DGND pin is
connected to the digital ground plane of the system. The analog
inputs on the AD7264 are true differential and have an input
impedance in excess of 1 GΩ; thus, no driving op amps are
required. The AD7264 can operate with either an internal or an
external reference. In Figure 26, the AD7264 is configured to
operate in control register mode; thus, G0 to G3, PD1, and PD2
can be connected to ground (low logic state). Figure 27 has the
gain pins configured for a gain of 2 setup; thus, the device is in
pin driven mode. Both circuit configurations illustrate the use
of the internal 2.5 V reference.
The CA_CBVCC and CC_CDVCC pins can be connected to either a
3 V or 5 V supply voltage. The AVCC pin must be connected to
a 5 V supply. All supplies should be decoupled with a 100 nF
capacitor at the device pin, and some supply sources may
require a 10 μF capacitor where the source is supplied to the
circuit board. The VDRIVE pin is connected to the supply voltage
of the microprocessor. The voltage applied to the VDRIVE input
controls the voltage of the serial interface. VDRIVE can be set to
3 V or 5 V.


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