Electronic Components Datasheet Search 

AD7264BCPZ Datasheet(PDF) 15 Page  Analog Devices 

AD7264BCPZ Datasheet(HTML) 15 Page  Analog Devices 
15 / 30 page AD7264 Data Sheet Rev. D  Page 14 of 29 TERMINOLOGY Differential Nonlinearity (DNL) Differential nonlinearity is the difference between the measured and the ideal 1 LSB change between any two adjacent codes in the ADC. Integral Nonlinearity (INL) Integral nonlinearity is the maximum deviation from a straight line passing through the endpoints of the ADC transfer function. The endpoints of the transfer function are zero scale, a single (1) LSB point below the first code transition, and full scale, a point 1 LSB above the last code transition. Zero Code Error This is the deviation of the midscale transition (all 1s to all 0s) from the ideal VIN voltage, that is, VCM − ½ LSB. Positive FullScale Error This is the deviation of the last code transition (011 … 110 to 011 … 111) from the ideal, that is, LSB 1 2 − × + Gain V V REF CM after the zero code error has been adjusted out. Negative FullScale Error This is the deviation of the first code transition (10 … 000 to 10 … 001) from the ideal, that is, LSB 1 2 + × − Gain V V REF CM after the zero code error has been adjusted out. Zero Code Error Match This is the difference in zero code error across both ADCs. Positive FullScale Error Match This is the difference in positive fullscale error across both ADCs. Negative FullScale Error Match This is the difference in negative fullscale error across both ADCs. TrackandHold Acquisition Time The trackandhold amplifier returns to track mode at the end of conversion. Trackandhold acquisition time is the time required for the output of the trackandhold amplifier to reach its final value, within ±1/2 LSB, after the end of conversion. Signalto(Noise + Distortion) Ratio This ratio is the measured ratio of signalto(noise + distortion) at the output of the analogtodigital converter. The signal is the rms amplitude of the fundamental. Noise is the sum of all non fundamental signals up to half the sampling frequency (fS/2), excluding dc. The ratio is dependent on the number of quan tization levels in the digitization process; the more levels, the smaller the quantization noise. The theoretical signalto(noise + distortion) ratio for an ideal Nbit converter with a sine wave input is given by Signalto(Noise + Distortion) = (6.02N + 1.76) dB Thus, for a 14bit converter, this is 86 dB. Total Harmonic Distortion (THD) Total harmonic distortion is the ratio of the rms sum of harmonics to the fundamental. For the AD7264, it is defined as 1 6 5 4 3 2 V V V V V V THD 2 2 2 2 2 log 20 (dB) + + + + = where V1 is the rms amplitude of the fundamental and V2, V3, V4, V5, and V6 are the rms amplitudes of the second through the sixth harmonics. Peak Harmonic or Spurious Noise Peak harmonic, or spurious noise, is defined as the ratio of the rms value of the next largest component in the ADC output spectrum (up to fS/2, excluding dc) to the rms value of the fun damental. Normally, the value of this specification is determined by the largest harmonic in the spectrum, but for ADCs where the harmonics are buried in the noise floor, it is a noise peak. ADCtoADC Isolation ADCtoADC isolation is a measure of the level of crosstalk between ADC A and ADC B. It is measured by applying a full scale, 100 kHz sine wave signal to all unselected input channels and determining how much that signal is attenuated in the selected channel with a 40 kHz signal. The figure given is the worstcase. Power Supply Rejection Ration (PSRR) Variations in power supply affect the fullscale transition but not the linearity of the converter. PSRR is the maximum change in the fullscale transition point due to a change in power supply voltage from the nominal value (see Figure 22). Propagation Delay Time, Low to High (tPLH) Propagation delay time from low to high is defined as the time taken from the 50% point on a low to high input signal until the digital output signal reaches 50% of its final low value. Propagation Delay Time, High to Low (tPHL) Propagation delay time from high to low is defined as the time taken from the 50% point on a high to low input signal until the digital output signal reaches 50% of its final high value. Comparator Offset Comparator offset is the measure of the density of digital 1s and 0s in the comparator output when the negative analog terminal of the comparator input is held at a static potential, and the analog input to the positive terminal of the comparators is varied proportionally about the static negative terminal voltage. 
