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NTE21256 Datasheet(PDF) 5 Page - NTE Electronics

Part No. NTE21256
Description  262,144-Bit Dynamic Random Access Memory (DRAM)
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Manufacturer  NTE [NTE Electronics]
Direct Link  http://www.nteinc.com
Logo NTE - NTE Electronics

NTE21256 Datasheet(HTML) 5 Page - NTE Electronics

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AC Characteristics (Cont’d):
(TA = 0° to +70°C, VCC = 5V ±10%, Note 9, Note 10, Note 11
unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Write Command Setup Time
tWCS
Note 20
0
ns
Write Command Hold Time
tWCH
45
ns
Write Command Hold Time referenced to RAS
tWCR
Note 17
120
ns
Write Command Pulse Width
tWP
45
ns
Write Command to RAS Lead Time
tRWL
45
ns
Write Command to CAS Lead Time
tCWL
45
ns
Data in Setup Time
tDS
Note 21
0
ns
Data in Hold Time
tDH
Note 21
45
ns
Data in Hold Time referenced to RAS
tDHR
Note 17
120
ns
CAS to WE Delay
tCWD
Note 20
75
ns
RAS to WE Delay
tRWD
Note 20
150
ns
RMW Cycle RAS Pulse Width
tRRW
200
ns
RMW Cycle CAS Pulse Width
tCRW
125
ns
Page Mode Cycle Time
tPC
Note 12
145
ns
Page Mode Read–Write Cycle Time
tPRWC
190
ns
Page Mode CAS Precharge Time
tCP
60
ns
Note 9. VIH and VIL are reference levels to measure timing of input signals. Also, transition times
are measured between VIH and VIL.
Note10. An initial pause of 200
µs is required after power–up followed by a minimum of eight initialization
cycles prior to normal operation.
Note 11. The time parameters specified here are valid for a transition time of tT = 5ns for the input signals
Note12. The specification for tRC (Min), tRWC (Min), and page–mode cycle time (tPC) are only used
to indicate cycle time at which proper operation over full temperature range
(0
°C ≤ TA ≤ +70°C) is assured.
Note17. tRCD + tCAH ≥ tAR Min, tRCD + tDH ≥ tDHR Min, tRCD + tWCH ≥ tWCR Min.
Note20. tWCS, tCWD, and tRWC are not restrictive operating parameters. They are included in the data
sheet as electrical characteristics only: If tWCS ≥ tWCS (Min), the cycle is an early write cycle
and the Data Out will remain open circuit (high impedance) throughout the entire cycle; if
tCWD ≥ tCWD (Min) and tRWD ≥ tRWD (Min) the cycle is a read–write cycle and the Data Out
will contain data read from the selected cell. If neither of the above sets of conditions is satis-
fied, the condition of the Data Out (at access time) is indeterminate.
Note21. tDS and tDH are referenced to the leading edge of CAS in early write cycles, and to the leading
edge of WE in delayed write of read–modify–write cycles.


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