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IDT74ALVCH16260 Datasheet(PDF) 1 Page - Integrated Device Technology

Part No. IDT74ALVCH16260
Description  3.3V CMOS 12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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IDT74ALVCH16260 Datasheet(HTML) 1 Page - Integrated Device Technology

   
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INDUSTRIALTEMPERATURERANGE
IDT74ALVCH16260
3.3V CMOS 12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCH
1
JANUARY 2004
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
© 2004 Integrated Device Technology, Inc.
DSC-4737/2
FEATURES:
• 0.5 MICRON CMOS Technology
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
•VCC = 3.3V ± 0.3V, Normal Range
•VCC = 2.7V to 3.6V, Extended Range
•VCC = 2.5V ± 0.2V
• CMOS power levels (0.4
µµµµµ W typ. static)
• Rail-to-Rail output swing for increased noise margin
• Available in SSOP and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
IDT74ALVCH16260
3.3V CMOS 12-BIT TO 24-BIT
MULTIPLEXED D-TYPE LATCH
WITH 3-STATE OUTPUTS
AND BUS-HOLD
DESCRIPTION:
This12-bitto24-bitmultiplexedD-typelatchisbuiltusingadvanceddual
metalCMOStechnology.TheALVCH16260isusedinapplicationsinwhich
twoseparatedatapathsmustbemultiplexedonto,ordemultiplexedfrom,a
singledatapath.Typicalapplicationsincludemultiplexingand/ordemultiplexing
addressanddatainformationinmicroprocessororbus-interfaceapplications.
Thisdevicealsoisusefulinmemoryinterleavingapplications.
Three 12-bit I/O ports (A1-A12, 1B1-1B12, and 2B1-2B12) are available
foraddressand/ordatatransfer.Theoutput-enable(OE1B,OE2B,andOEA)
inputs control the bus transceiver functions. The OE1B and OE2B control
signals also allow bank control in the A-to-B direction. Address and/or data
informationcanbestoredusingtheinternalstoragelatches.Thelatch-enable
(LE1B, LE2B, LEA1B, and LEA2B) inputs are used to control data storage.
Whenthelatch-enableinputishigh,thelatchistransparent.Whenthelatch-
enableinputgoeslow,thedatapresentattheinputsislatchedandremains
latcheduntilthelatch-enableinputisreturnedhigh.
The ALVCH16260 has been designed with a ±24mA output driver. This
driveriscapableofdrivingamoderatetoheavyloadwhilemaintainingspeed
performance.
The ALVCH16260 has “bus-hold” which retains the inputs’ last state
whenevertheinputgoestoahighimpedance.Thispreventsfloatinginputs
andeliminatestheneedforpull-up/downresistors.
APPLICATIONS:
• 3.3V high speed systems
• 3.3V and lower voltage computing systems
DRIVE FEATURES:
• High Output Drivers: ±24mA
• Suitable for heavy loads
LE1B
LEA1B
OE1B
SEL
OE A
A1:12
LE2B
LEA2B
OE2B
A-1B
LATC H
1B-A
LATC H
A-2B
LATC H
2B-A
LATC H
M
U
X
1
0
12
12
12
12
12
12
12
1
B 1:12
2
B1:12
12
12
30
29
2
28
1
27
55
56


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