INDUSTRIALTEMPERATURERANGE

2

IDT74ALVCH16260

3.3V CMOS 12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCH

SSOP/ TSSOP

TOP VIEW

PIN CONFIGURATION

OEA

2

GND

2

2

GND

GND

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

48

49

50

51

52

53

54

55

56

1

OE2B

2

GND

2

2

2

2

2

2

2

2

GND

1

1

1

1

GND

1

1

1

GND

1

LE2B

SEL

25

26

27

28

32

31

30

29

GND

1

LEA1B

OE1B

1

1

LE1B

LEA2B

NOTE:

1. As applicable to the device type.

Symbol

Conditions

Typ.

Max.

Unit

Input Capacitance

5

7

pF

Output Capacitance

7

9

pF

I/O Port Capacitance

7

9

pF

Symbol

Description

Max

Unit

–0.5 to +4.6

V

V

Storage Temperature

–65 to +150

°C

DC Output Current

–50 to +50

mA

Continuous Clamp Current,

±50

mA

–50

mA

Continuous Current through each

±100

mA

NOTES:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause

permanent damage to the device. This is a stress rating only and functional operation

of the device at these or any other conditions above those indicated in the operational

sections of this specification is not implied. Exposure to absolute maximum rating

conditions for extended periods may affect reliability.

Inputs

Output

1Bx

2Bx

SEL

LE1B

LE2B

OEA

Ax

HX

H

H

X

L

H

LX

H

H

X

L

L

XX

H

L

X

L

A

0

(2)

XH

L

X

H

L

H

XL

L

X

H

L

L

XX

L

X

L

L

A

0

(2)

XXX

X

X

H

Z

B-TO-A (OEB = H)