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MSP430X11X2 Datasheet(PDF) 6 Page - Texas Instruments

Part No. MSP430X11X2
Description  MIXED SIGNAL MICROCONTROLLER
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

MSP430X11X2 Datasheet(HTML) 6 Page - Texas Instruments

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MSP430x11x2, MSP430x12x2
MIXED SIGNAL MICROCONTROLLER
SLAS361D − JANUARY 2002 − REVISED AUGUST 2004
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions, MSP430x12x2
TERMINAL
I/O
DESCRIPTION
NAME
DW & PW
RHB
I/O
DESCRIPTION
P1.0/TACLK/
ADC10CLK
21
21
I/O
General-purpose digital I/O pin/Timer_A, clock signal TACLK input/conversion
clock—10-bit ADC
P1.1/TA0
22
22
I/O
General-purpose digital I/O pin/Timer_A, capture: CCI0A input, compare: Out0
output/BSL transmit
P1.2/TA1
23
23
I/O
General-purpose digital I/O pin/Timer_A, capture: CCI1A input, compare: Out1 output
P1.3/TA2
24
24
I/O
General-purpose digital I/O pin/Timer_A, capture: CCI2A input, compare: Out2 output
P1.4/SMCLK/TCK
25
25
I/O
General-purpose digital I/O pin/SMCLK signal output/test clock, input terminal for
device programming and test
P1.5/TA0/TMS
26
26
I/O
General-purpose digital I/O pin/Timer_A, compare: Out0 output/test mode select,
input terminal for device programming and test
P1.6/TA1/TDI/TCLK
27
27
I/O
General-purpose digital I/O pin/Timer_A, compare: Out1 output/test data input
terminal or test clock input
P1.7/TA2/TDO/TDI
28
28
I/O
General-purpose digital I/O pin/Timer_A, compare: Out2 output/test data output
terminal or data input during programming
P2.0/ACLK/A0
8
6
I/O
General-purpose digital I/O pin/ACLK output/analog input to 10-bit ADC input A0
P2.1/INCLK/A1
9
7
I/O
General-purpose digital I/O pin/Timer_A, clock signal at INCLK/analog input to 10-bit
ADC input A1
P2.2/TA0/A2
10
8
I/O
General-purpose digital I/O pin/Timer_A, capture: CCI0B input, compare: Out0
output/analog input to 10-bit ADC input A2/BSL receive
P2.3/TA1/A3/VREF−/
VeREF−
19
18
I/O
General-purpose digital I/O pin/Timer_A, capture: CCI1B input, compare: Out1
output/analog input to 10-bit ADC input A3/negative reference voltage terminal.
P2.4/TA2/A4/VREF+/
VeREF+
20
19
I/O
General-purpose digital I/O pin/Timer_A, compare: Out2 output/analog input to 10-bit
ADC input A4/I/O of positive reference voltage terminal
P2.5/ROSC
3
32
I/O
General-purpose digital I/O pin/Input for external resistor that defines the DCO
nominal frequency
P3.0/STE0/A5
11
9
I/O
General-purpose digital I/O pin/slave transmit enable—USART0/SPI mode/analog
input to 10-bit ADC input A5
P3.1/SIMO0
12
10
I/O
General-purpose digital I/O pin/slave in/master out of USART0/SPI mode
P3.2/SOMI0
13
11
I/O
General-purpose digital I/O pin/slave out/master in of USART0/SPI mode
P3.3/UCLK0
14
12
I/O
General-purpose digital I/O pin/external clock input—USART0/UART or SPI mode,
clock output—USART0/SPI mode clock input
P3.4/UTXD0
15
13
I/O
General-purpose digital I/O pin/transmit data out—USART0/UART mode
P3.5/URXD0
16
14
I/O
General-purpose digital I/O pin/receive data in—USART0/UART mode
P3.6/A6
17
15
I/O
General-purpose digital I/O pin/analog input to 10-bit ADC input A6
P3.7/A7
18
16
I/O
General-purpose digital I/O pin/analog input to 10-bit ADC input A7
RST/NMI
7
5
I
Reset or nonmaskable interrupt input
TEST
1
29
I
Selects test mode for JTAG pins on P1.x
VCC
2
30
Supply voltage
VSS
4
1
Ground reference
XIN
6
3
I
Input terminal of crystal oscillator
XOUT
5
2
O
Output terminal of crystal oscillator
NC
NA
4,17,20,31
Not connected internally. Recommended connection to VSS.
QFN Pad
NA
QFN package pad connection to VSS recommended.
TDO or TDI is selected via JTAG instruction.


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