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MM74HC137 Datasheet(PDF) 3 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # MM74HC137
Description  3-to-8 Line Decoder With Address Latches (Inverted Output)
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

MM74HC137 Datasheet(HTML) 3 Page - National Semiconductor (TI)

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AC Electrical Characteristics VCCe5V TAe25 C CLe15 pF tretfe6ns
Symbol
Parameter
Conditions
Typ
Guaranteed
Units
Limit
tPLH
Maximum Propagation Delay A B or C to any Y Output
14
29
ns
tPHL
Maximum Propagation Delay A B or C to any Y Output
20
42
ns
tPLH
Maximum Propagation Delay G2 to any Y Output
12
22
ns
tPHL
Maximum Propagation Delay G2 to any Y Output
15
34
ns
tPLH
Maximum Propagation Delay G1 to any Output
13
25
ns
tPHL
Maximum Propagation Delay GL to any Output
17
34
ns
tPLH
Maximum Propagation GL to Output
15
30
ns
tPHL
Maximum Propagation Delay GL to Output
22
34
ns
tS
Minimum Setup Time at A B and C Inputs
20
ns
tH
Minimum Hold Time at A B and C Inputs
0
ns
tW
Minimum Pulse Width of Enabling Pulse at GL
16
ns
AC Electrical Characteristics CLe50 pF tretfe6 ns (unless otherwise specified)
TAe25 C
74HC
54HC
Symbol
Parameter
Conditions
VCC
TAeb40 to 85 CTAeb55 to 125 C
Units
Typ
Guaranteed Limits
tPLH
Maximum Propagation Delay
20V
85
170
214
253
ns
A B or C to any Y Output
45V
17
34
43
51
ns
60V
14
29
36
43
ns
tPHL
Maximum Propagation Delay
20V
120
240
302
358
ns
A B or C to any Y Output
45V
24
48
60
72
ns
60V
20
41
51
61
ns
tPLH
Maximum Propagation Delay
20V
65
130
164
194
ns
G2 to any Y Output
45V
13
26
33
39
ns
60V
11
22
28
33
ns
tPLH
Maximum Propagation
20V
75
150
189
224
ns
Delay G1 to Output
45V
15
30
38
45
ns
60V
13
26
32
38
ns
tPHL
Maximum Propagation
20V
98
195
246
291
ns
Delay G1 to Output
45V
20
39
49
58
ns
60V
17
33
42
49
ns
tPLH
Maximum Propagation
20V
88
175
221
261
ns
Delay GL to Output
45V
18
35
44
52
ns
60V
15
30
37
44
ns
tPHL
Maximum Propagation
20V
125
250
315
373
ns
Delay GL to Output
45V
25
50
63
75
ns
60V
21
43
54
63
ns
tPHL
Maximum Propagation Delay
20V
98
195
246
291
ns
G2 to any Y Output
45V
20
39
49
58
ns
60V
17
33
42
49
ns
tS
Minimum Setup Time
20V
100
125
150
ns
at A B and C inputs
45V
20
25
30
ns
60V
17
21
25
ns
tH
Minimum Hold Time
20V
50
63
75
ns
at A B and C inputs
45V
10
13
15
ns
60V
8
11
13
ns
tTLH tTHL
Output Rise and
20V
30
75
95
110
ns
Fall Time
45V
8
15
19
22
ns
60V
7
13
16
19
ns
tW
Minimum Pulse Width
20V
80
100
120
ns
of Enabling Pulse at GL
45V
16
20
24
ns
60V
14
18
21
ns
CPD
Power Dissipation
75
pF
Capacitance (Note 5)
CIN
Maximum Input Capacitance
5
10
10
10
pF
Note 5
CPD determines the no load dynamic power consumption PDeCPD VCC2 faICC VCC and the no load dynamic current consumption ISeCPD VCC faICC
3


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