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LP38691SDX-1.8 Datasheet(PDF) 5 Page - National Semiconductor (TI) |
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LP38691SDX-1.8 Datasheet(HTML) 5 Page - National Semiconductor (TI) |
5 / 15 page Electrical Characteristics Limits in standard typeface are for T J = 25˚C, and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: V IN =VOUT + 1V, CIN =COUT = 10 µF, ILOAD = 10mA. Min/Max limits are guaranteed through testing, statistical correlation, or design. (Continued) Symbol Parameter Conditions MIN TYP (Note 4) MAX Units e n Output Noise BW = 10Hz to 10kHz V O = 3.3V 0.7 µV/ V O (LEAK) Output Leakage Current V O =VO(NOM) + 1V @ 10VIN 0.5 12 µA V EN Enable Voltage (LP38693 Only) Output = OFF 0.4 V Output = ON, V IN =4V 1.8 Output = ON, V IN =6V 3.0 Output = ON, V IN = 10V 4.0 I EN Enable Pin Leakage (LP38693 Only) V EN = 0V or 10V, VIN = 10V -1 0.001 1 µA Note 1: Absolute maximum ratings indicate limits beyond which damage to the component may occur. Operating ratings indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications, see Electrical Characteristics. Specifications do not apply when operating the device outside of its rated operating conditions. Note 2: At elevated temperatures, device power dissipation must be derated based on package thermal resistance and heatsink values (if a heatsink is used). The junction-to-ambient thermal resistance ( θJ-A) for the TO-252 is approximately 90˚C/W for a PC board mounting with the device soldered down to minimum copper area (less than 0.1 square inch). If one square inch of copper is used as a heat dissipator for the TO-252, the θJ-A drops to approximately 50˚C/W. The SOT-223 package has a θJ-A of approximately 125˚C/W when soldered down to a minimum sized pattern (less than 0.1 square inch) and approximately 70˚C/W when soldered to a copper area of one square inch. The θJ-A values for the LLP package are also dependent on trace area, copper thickness, and the number of thermal vias used (refer to application note AN-1187). If power disspation causes the junction temperature to exceed specified limits, the device will go into thermal shutdown. Note 3: ESD is tested using the human body model which is a 100pF capacitor discharged through a 1.5k resistor into each pin. Note 4: Typical numbers represent the most likely parametric norm for 25˚C operation. Note 5: If used in a dual-supply system where the regulator load is returned to a negative supply, the output pin must be diode clamped to ground. Note 6: Output voltage line regulation is defined as the change in output voltage from nominal value resulting from a change in input voltage. Note 7: Output voltage load regulation is defined as the change in output voltage from nominal value as the load current increases from 1mA to full load. Note 8: Dropout voltage is defined as the minimum input to output differential required to maintain the output within 100mV of nominal value. www.national.com 5 |
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