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K4S641632H-TC75 Datasheet(PDF) 10 Page - Samsung semiconductor

Part # K4S641632H-TC75
Description  64Mb H-die SDRAM Specification 54 TSOP-II with Pb-Free
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Manufacturer  SAMSUNG [Samsung semiconductor]
Direct Link  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

K4S641632H-TC75 Datasheet(HTML) 10 Page - Samsung semiconductor

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SDRAM 64Mb H-die (x4, x8, x16)
CMOS SDRAM
Rev. 1.8 August 2004
AC OPERATING TEST CONDITIONS (VDD = 3.3V ± 0.3V, TA = 0 to 70°C)
Parameter
Value
Unit
AC input levels (Vih/Vil)
2.4/0.4
V
Input timing measurement reference level
1.4
V
Input rise and fall time
tr/tf = 1/1
ns
Output timing measurement reference level
1.4
V
Output load condition
See Fig. 2
3.3V
1200
870
Output
30pF
VOH (DC) = 2.4V, IOH = -2mA
VOL (DC) = 0.4V, IOL = 2mA
Vtt = 1.4V
50
Output
30pF
Z0 = 50
(Fig. 2) AC output load circuit
(Fig. 1) DC output load circuit
Notes : 1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time
and then rounding off to the next higher integer.
2. Minimum delay is required to complete write.
3. All parts allow every cycle column address change.
4. In case of row precharge interrupt, auto precharge and read burst stop.
5. In 100MHz and below 100MHz operating conditions, tRDL=1CLK and tDAL=1CLK + 20ns is also supported.
SAMSUNG recommends tRDL=2CLK and tDAL=2CLK + tRP.
OPERATING AC PARAMETER
(AC operating conditions unless otherwise noted)
Parameter
Symbol
Version
Unit
Note
60
70
75
Row active to row active delay
tRRD(min)
12
14
15
ns
1
RAS to CAS delay
tRCD(min)
18
20
20
ns
1
Row precharge time
tRP(min)
18
20
20
ns
1
Row active time
tRAS(min)
42
49
45
ns
1
tRAS(max)
100
us
Row cycle time
tRC(min)
60
68
65
ns
1
Last data in to row precharge
tRDL(min)
2
CLK
2,5
Last data in to Active delay
tDAL(min)
2 CLK + tRP
-
5
Last data in to new col. address delay
tCDL(min)
1
CLK
2
Last data in to burst stop
tBDL(min)
1
CLK
2
Col. address to col. address delay
tCCD(min)
1
CLK
3
Number of valid output data
CAS latency = 3
2
ea
4
CAS latency = 2
1


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