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IDT79RV4700-133GH Datasheet(PDF) 9 Page - Integrated Device Technology |
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IDT79RV4700-133GH Datasheet(HTML) 9 Page - Integrated Device Technology |
9 / 25 page 9 of 25 April 10, 2001 IDT79R4700 Mode bit Description Mode bit Description 0 reserved (must be zero) 14:13 Output driver strength 10 → 100% strength (fastest), 11 → 83% strength, 00 → 67% strength, 01 → 50% strength (slowest) 4:1 Writeback data rate 0 → ∆, 1 → DDx, 2 → DDxx, 3 → DxDx, 4 → DDxxx, 5 → DDxxxx, 6 → DxxDxx, 7 → DDxxxxxx, 8 → DxxxDxxx, 9- → reserved bit 15 0 → TClock[0] enabled 1 → TClock[0] disabled 7:5 Clock divisor 0 → 2, 1 → 3, 2 → 4, 3 → 5, 4 → 6, 5 → 7, 6 → 8, 7 reserved bit 16 0 → TClock[1] enabled 1 → TClock[1] disabled 80 → Little endian, 1 → Big endian bit 17 0 →RClock[0] enabled 1 → RClock[0] disabled 10:9 00 → R4000 compatible, 01 → reserved, 10 → pipelined writes, 11 → write re-issue bit 18 0 → RClock[1] enabled 1 →RClock[1] disabled 11 Disable the timer interrupt on Int[5]. 0 → Enabled 1 → Disabled 255:19 Reserved (must be zero) 12 reserved (must be zero) Table 3 Boot-time Serial Mode Stream |
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