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IS61LV12816-12LQI Datasheet(PDF) 5 Page - Integrated Silicon Solution, Inc

Part No. IS61LV12816-12LQI
Description  128K x 16 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY
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Maker  ISSI [Integrated Silicon Solution, Inc]
Homepage  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS61LV12816-12LQI Datasheet(HTML) 5 Page - Integrated Silicon Solution, Inc

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IS61LV12816
Integrated Silicon Solution, Inc. — 1-800-379-4774
5
Rev. A
11/30/00
ISSI®
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
-8 ns
-10 ns
-12 ns
-15 ns
Symbol
Parameter
Min.
Max
Min.
Max.
Min.
Max.
Min.
Max.
Unit
tRC
Read Cycle Time
8
10
12
15
ns
tAA
Address Access Time
8
10
12
15
ns
tOHA
Output Hold Time
3
3
3
3
ns
tACE
CE Access Time
8
——
10
12
15
ns
tDOE
OE Access Time
3
4
5
6ns
tHZOE(2) OE to High-Z Output
3
4
50
6
ns
tLZOE(2)
OE to Low-Z Output
0
0
0
0
ns
tHZCE(2) CE to High-Z Output
0
3
0
4
0
5
0
8
ns
tLZCE(2)
CE to Low-Z Output
3
3
3
3
ns
tBA
LB, UB Access Time
3
4
5
6ns
tHZB(2)
LB, UB to High-Z Output
0
3
0
4
0
5
0
6
ns
tLZB(2)
LB, UB to Low-Z Output
0
0
0
0
ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels
of 0V to 3.0V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
AC TEST CONDITIONS
Parameter
Unit
Input Pulse Level
0V to 3.0V
Input Rise and Fall Times
3 ns
Input and Output Timing
1.5V
and Reference Level
Output Load
See Figures 1 and 2
AC TEST LOADS
Figure 1.
319
5 pF
Including
jig and
scope
353
OUTPUT
3.3V
CAPACITANCE(1)
Symbol
Parameter
Conditions
Max.
Unit
CIN
Input Capacitance
VIN = 0V
6
pF
COUT
Input/Output Capacitance
VOUT = 0V
8
pF
Note:
1. Tested initially and after any design or process changes that may affect these parameters.
319
30 pF
Including
jig and
scope
353
OUTPUT
3.3V
Figure 2.


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