ICM107B Mega pixel CMOS sensor

Data sheet Version 0.5, January 2002

©2000, 2001,2002 IC Media Corporation & IC Media Technology Corp

10/29/2002

page 8

Confidential

2.5 Output Format

During normal operation, the output format is 10-bit raw data that ranges from 0 to 1023. It may be used

for off-chip color processing or compression. A typical configuration is to connect ICM-107B to a USB1,

a USB2, or a 1394/Compression combo chip. At 30 fps, the PCLK and main clock are both operating at 48

MHz.

In addition to the data pins, the chip also output VSYNC, HSYNC, and PCLK. The length and polarity of

VSYNC and HSYNC can be adjusted through registers. The line and frame timing can be adjusted through

registers AD_WIDTH and AD_HEIGHT.

2.6 SIF Interface

Register programming is through SIF interface (SCL and SDA pins). The default 7-bit SIF device address

is 0x20, meanwhile the last bit can be configured by the SIF ID pin. ICM-107B can operate in either SIF

master mode or slave mode right after power up, depending on the pull-up or pull-down of the MSSEL pin.

When MSSEL is pulled low during power-up, ICM-107B’s SIF interface is operated as an SIF slave

device, waiting to be controlled by an external SIF master such as a microprocessor. When MSSEL is

pulled high during power-up, the SIF interface is first acting as an SIF master device trying to read from an

external SIF EEPROM. After that, it will fall back to behave like an SIF slave.