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MC908GR4MDWR2 Datasheet(PDF) 38 Page - Motorola, Inc |
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MC908GR4MDWR2 Datasheet(HTML) 38 Page - Motorola, Inc |
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38 / 408 page  Memory Map Technical Data MC68HC908GR8 — Rev 4.0 38 Memory Map MOTOROLA $FE08 FLASH Control Register (FLCR) $FE09 Break Address Register High (BRKH) $FE0A Break Address Register Low (BRKL) $FE0B Break Status and Control Register (BRKSCR) $FE0C LVI Status Register (LVISR) $FE0D Reserved 3 Bytes ↓ $FE0F $FE10 Unimplemented 16 Bytes Reserved for Compatibility with Monitor Code for A-Family Parts ↓ $FE1F $FE20 Monitor ROM 310 Bytes ↓ $FF55 $FF56 Unimplemented 40 Bytes ↓ $FF7D $FF7E FLASH Block Protect Register (FLBPR) $FF7F Unimplemented 93 Bytes ↓ $FFDB Note: $FFF6–$FFFD contains 8 security bytes $FFDC FLASH Vectors (36 Bytes inluding $FFFF) ↓ $FFFE $FFFF Low byte of reset vector when read COP Control Register (COPCTL) Figure 2-1. Memory Map (Continued) Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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