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AD5252 Datasheet(PDF) 6 Page - Analog Devices

Part No. AD5252
Description  Dual 64-and 256-Position I2C Nonvolatile Memory Digital Potentiometers
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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AD5252 Datasheet(HTML) 6 Page - Analog Devices

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AD5251/AD5252
Rev. 0 | Page 6 of 28
Parameter
Symbol
Conditions
Min
Typ1
Max
Unit
Dual-Supply Power Range
VDD/VSS
±2.25
±2.75
V
Positive Supply Current
IDD
VIH = VDD or VIL = GND
5
15
µA
Negative Supply Current
ISS
VIH = VDD or VIL = GND, VDD = +2.5 V, VSS
= -2.5 V
−5
−15
µA
EEMEM Data Storing Mode
Current
IDD_STORE
VIH = VDD or VIL = GND, TA = 0°C to 85°C
35
mA
EEMEM Data Restoring Mode
Current6
IDD_RESTORE
VIH = VDD or VIL = GND, TA = 0°C to 85°C
2.5
mA
Power Dissipation7
PDISS
VIH = VDD = 5 V or VIL = GND
0.075
mW
Power Supply Sensitivity
PSS
∆VDD = 5 V ±10%
−0.005
+0.002
+0.005
%/%
∆VDD = 3 V ±10%
−0.01
+0.002
+0.01
%/%
DYNAMIC CHARACTERISTICS5, 8
–3 dB Bandwidth
BW
RAB = 10 kΩ/50 kΩ/100 kΩ
400/80/40
kHz
Total Harmonic Distortion
THDW
VA = 1 Vrms, VB = 0 V, f = 1 kHz
0.05
%
VW Settling Time
tS
VA = VDD, VB = 0 V, RAB = 10 kΩ/50
kΩ/100 kΩ
1.5/7/14
µs
Resistor Noise Voltage
eN_WB
10 kΩ/50 kΩ/100 kΩ, code = midscale,
f = 1 kHz (thermal noise only)
9/20/29
nV/√Hz
Digital Crosstalk
CT
VA = VDD, VB = 0 V, Measure VW with
adjacent RDAC making full scale
change
-80
dB
Analog Coupling
CAT
Signal input at A1 and measure output
at W3, f = 1kHz
-72
dB
1 Typical represents the average reading at 25°C and VDD = 5 V.
2 Resistor position nonlinearity error (R-INL) is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic, except R-DNL of AD5252 1 kΩ
version at VDD = 2.7 V, IW = VDD/R for both VDD = 3 V or VDD = 5 V.
3 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0 V. DNL
specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions.
4 Resistor Terminals A, B, and W have no limitations on polarity with respect to each other.
5 Guaranteed by design and not subject to production test.
6 cmd 0 NOP should be activated after cmd 1 to minimize IDD_READ current consumption.
7 PDISS is calculated from IDD × VDD = 5 V.
8 All dynamic characteristics use VDD = 5 V.


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