ST72324BLJ2 datasheet(40/151 Pages) STMICROELECTRONICS

Part #	ST72324BLJ2

Description	3V RANGE 8-BIT MCU WITH 8 TO 32K FLASH/ROM, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE

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Manufacturer	STMICROELECTRONICS [STMicroelectronics]

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ST72F324L, ST72324BL

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I/O PORTS (Cont’d)

Figure 25. I/O Port General Block Diagram

Table 10. I/O Port Mode Options

Legend: NI - not implemented

Off - implemented not activated

On - implemented and activated

Note: The diode to VDD is not implemented in the

true open drain pads. A local protection between

the pad and VSS is implemented to protect the de-

vice against positive stress.

Configuration Mode

Pull-Up

P-Buffer

Diodes

to VDD

to VSS

Input

Floating with/without Interrupt

Off

On

Pull-up with/without Interrupt

On

Output

Push-pull

Off

On

Open Drain (logic level)

Off

True Open Drain

NI

NI (see note)

DR

DDR

OR

PAD

VDD

ALTERNATE

ENABLE

ALTERNATE

OUTPUT

1

0

OR SEL

DDR SEL

DR SEL

PULL-UP

CONDITION

P-BUFFER

(see table below)

N-BUFFER

PULL-UP

(see table below)

1

0

ANALOG

INPUT

If implemented

ALTERNATE

INPUT

VDD

DIODES

(see table below)

EXTERNAL

SOURCE (eix)

INTERRUPT

CMOS

SCHMITT

TRIGGER

REGISTER

ACCESS

1

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