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PTLV75712PDRVR Datasheet(PDF) 10 Page - Texas Instruments

Part # PTLV75712PDRVR
Description  1-A, Low IQ, Small Size, Low Dropout Regulator
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

PTLV75712PDRVR Datasheet(HTML) 10 Page - Texas Instruments

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TLV757P
SBVS322 – OCTOBER 2017
www.ti.com
Product Folder Links: TLV757P
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Copyright © 2017, Texas Instruments Incorporated
8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
8.1.1 Input and Output Capacitor Selection
The TLV757P requires an output capacitance of 0.47 μF or larger for stability. Use X5R- and X7R-type ceramic
capacitors because these capacitors have minimal variation in capacitance value and equivalent series
resistance (ESR) over temperature. When selecting a capacitor for a specific application, consider the DC bias
characteristics for the capacitor. Higher output voltages cause a significant derating of the capacitor. As a
general rule, ceramic capacitors must be derated by 50%. For best performance, TI recommends a maximum
output capacitance value of 200 µF.
Place a 1-µF capacitor on the input pin of the LDO . Some input supplies have a high impedance, which places
the input capacitor on the input supply, which reduces the input impedance. This capacitor counteracts reactive
input sources and improves transient response and PSRR. If the input supply has a high impedance over a large
range of frequencies, several input capacitors are used in parallel to lower the impedance over frequency. Use a
higher-value capacitor if large, fast, rise-time load transients are expected, or if the device is located several
inches from the input power source.
8.1.2 Dropout Voltage
Use a PMOS pass transistor achieve low dropout. When (VIN – VOUT) is less than the dropout voltage (VDO), the
PMOS pass device is in the linear region of operation and the input-to-output resistance is the RDS(ON) of the
PMOS pass element. VDO scales linearly with the output current because the PMOS device functions like a
resistor in dropout mode. As with any linear regulator, PSRR and transient response degrade as (VIN – VOUT)
approaches dropout operation. See Figure 7 for typical dropout values.
Figure 7. Dropout vs VIN
8.1.3 Exiting Dropout
Some applications have transients that place the LDO into dropout, such as slower ramps on VIN for start-up. As
with other LDOs, the output overshoots on recovery from these conditions. A ramping input supply causes an
LDO to overshoot on start-up when the slew rate and voltage levels are in the correct range, as Figure 8 shows.
Use an enable signal to avoid this condition.


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