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SCN68652AC2A44 Datasheet(PDF) 5 Page - NXP Semiconductors

Part # SCN68652AC2A44
Description  Multi-protocol communications controller (MPCC)
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

SCN68652AC2A44 Datasheet(HTML) 5 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
SCN2652/SCN68652
Multi-protocol communications controller (MPCC)
1995 May 01
5
Table 1.
Register Access
REGISTERS
NO. OF BITS
DESCRIPTION*
Addressable
PCSAR
Parameter control sync/
address register
16
PCSARH and PCR contain parameters common to the
receiver and transmitter. PCSARL contains a programmable
SYNC character (BCP) or secondary station address (BOP).
PCR
Parameter control register
8
RDSRH contains receiver status information.
RDSR
Receive data/status register
16
RDSRL = RxDB contains the received assembled character.
TDSR
Transmit data/status register
16
TDSRH contains transmitter command and status
information. TDSRL = TxDB contains the character to be
transmitted
Non-Addressable
CCSR
Control character shift register
8
HSR
Holding shift register
16
RxSR
Receiver shift register
8
These registers are used for character assembly (CSSR
TxSR
Transmitter shift register
8
These registers are used for character assembly (CSSR,
HSR, RxSR), disassembly (TxSR), and CRC
RxCRC
Receiver CRC accumulation
register
16
,),
y (
),
accumulation/generation (RxCRC, TxCRC).
TxCRC
Transmitter CRC generation
register
16
NOTES:
*H = High byte – bits 15–8
L = Low byte – bits 7–0
Table 2.
Error Control
CHARACTER
DESCRIPTION
FCS
Frame check sequence is transmitted/received
as 16 bits following the last data character of a
BOP message. The divisor is usually
CRC–CCITT (X16 + X12 + X5 + 1) with dividend
preset to 1’s but can be other wise determined
by ECM. The inverted remainder is transmitter as
the FCS.
BCC
Block check character is transmitted/received as
two successive characters following the last data
character of a BCP message. The polynomial is
CRC–16 (X16 + X15 + X2 + 1) or CRC–CCITT
with dividend preset to 0’s (as specified by
ECM). The true remainder is transmitted as the
BCC.
Table 3.
Special Characters
OPERATION
BIT PATTERN
FUNCTION
BOP
FLAG
01111110
Frame message
ABORT
11111111 generation
Terminate communication
01111111 detection
GA
01111111
Terminate loop mode
repeater function
Address
(PCSARL)1
Secondary station address
BCP
SYNC
(PCSARL) or
(TxDB)2 generation
Character synchronization
NOTES:
1. ( ) = contents of.
2. For IDLE = 0 or 1 respectively.
APA
PCSAR
PCR
RDSR
TDSR
15
PROTO
14
SS/GA
13
SAM
12
IDLE
11
E C M
10
98
S/AR
7
6
54
32 10
TxCL
15
14
13
12
11
RxCL
10
9
8
Tx
CL
E
R x
CL
E
RERR
15
A B C
14
13
ROR
12
RAB/
GA
11
REOM
10
9
8
RxDB
RSOM
TERR
15
NOT DEFINED
14
13
TGA
12
TABORT
11
TEOM
10
9
8
TxDB
TSOM
NOTE:
Refer to Register Formats for mnemonics and description.
SD00059
Figure 3. Short Form Register Bit Formats


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