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OPA202ID Datasheet(PDF) 5 Page - Texas Instruments

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Part # OPA202ID
Description  Precision, Low-Noise, Heavy Capacitive Drive, 36-V Operational Amplifier
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

OPA202ID Datasheet(HTML) 5 Page - Texas Instruments

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5
OPA202, OPA2202, OPA4202
www.ti.com
SBOS812 – OCTOBER 2017
Product Folder Links: OPA202 OPA2202 OPA4202
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
Input terminals are diode-clamped to the power-supply rails. Input signals that swing more than 0.5 V beyond the supply rails must be
current-limited to 10 mA or less.
(3)
Input terminals are anti-parallel diode-clamped to each other. Input signals that cause differential voltages of swing more than ± 0.5 V
must be current-limited to 10 mA or less.
(4)
Short-circuit to ground, one amplifier per package.
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
MAX
UNIT
Supply voltage,
VS = (V+) – (V–)
Single-supply
40
V
Dual-supply
±20
Signal input pins
Voltage
Common-mode(2)
(V–) – 0.5
(V+) + 0.5
Differential(3)
±0.5
Current
±10
mA
Output short current(4)
Continuous
Operating temperature, TA
–40
125
°C
Junction temperature, TJ
125
Storage temperature, Tstg
–65
150
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.2 ESD Ratings
VALUE
UNIT
V(ESD)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
±2500
V
Charged device model (CDM), per JEDEC specification JESD22-C101(2)
±1000
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VS
Supply voltage, [ (V+) – (V–) ]
Single-supply
4.5
36
V
Dual-supply
±2.25
±18
Specified temperature
–40
105
°C
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
7.4 Thermal Information: OPA202
THERMAL METRIC(1)
OPA202
UNIT
D (SOIC)
8 PINS
RθJA
Junction-to-ambient thermal resistance
136
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
74
°C/W
RθJB
Junction-to-board thermal resistance
62
°C/W
ΨJT
Junction-to-top characterization parameter
19.7
°C/W
ΨJB
Junction-to-board characterization parameter
54.8
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
°C/W


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