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LMX2572 Datasheet(PDF) 4 Page - Texas Instruments |
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LMX2572 Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 87 page  4 LMX2572 SNAS740A – OCTOBER 2017 – REVISED OCTOBER 2017 www.ti.com Product Folder Links: LMX2572 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Pin Functions (continued) PIN I/O DESCRIPTION NAME NO. SysRefReq 28 Input SYSREF request for JESD204B support. Configurable to accept CMOS input (1.8-V to 3.3-V logic) or differential input. VbiasVARAC 33 Bypass VCO Varactor bias. Connect a 10-µF decoupling capacitor to VCO ground. VbiasVCO 3 Bypass VCO bias. Connect a 10-µF decoupling capacitor to VCO ground as close to this pin as possible. VbiasVCO2 27 Bypass VCO bias. Connect a 1-µF decoupling capacitor to VCO ground. VccBUF 21 Supply Supply for output buffers. Connect a 0.1-µF decoupling capacitor to RF ground. VccCP 11 Supply Supply for charge pump. Connect a 0.1-µF decoupling capacitor to charge pump ground. VccDIG 7 Supply Digital power supply. Connect a 0.1-µF decoupling capacitor to digital ground. VccMASH 15 Supply Digital power supply. Connect a 0.1-µF and a 10-µF decoupling capacitor to digital ground. VccVCO 37 Supply Supply for VCO. Connect a 0.1-µF and a 10-µF decoupling capacitor to VCO ground. VccVCO2 26 Supply Supply for VCO. Connect a 0.1-µF and a 10-µF decoupling capacitor to VCO ground. VrefVCO 36 Bypass VCO supply reference. Connect a 10-µF decoupling capacitor to VCO ground. VrefVCO2 29 Bypass VCO supply reference. Connect a 10-µF decoupling capacitor to VCO ground. VregIN 10 Bypass Input reference path regulator output. Connect a 1-µF decoupling capacitor to RF ground as close to this pin as possible. VregVCO 38 Bypass VCO regulator node. Connect a 1-µF decoupling capacitor to VCO ground. Vtune 35 Input VCO tuning voltage input. (1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT VCC Power supply voltage –0.3 3.6 V VIN Digital IO input voltage VCC + 0.3 V TJ Junction temperature 150 °C Tstg Storage temperature –65 150 °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2000 V Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) ±500 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT TA Ambient temperature –40 85 °C TJ Junction temperature 125 °C |
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