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AD10242 Datasheet(PDF) 15 Page - Analog Devices |
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AD10242 Datasheet(HTML) 15 Page - Analog Devices |
15 / 16 page AD10242 –14– Care should be taken when placing the digital output runs. Because the digital outputs have such a high slew rate, the capacitive loading on the digital outputs should be minimized. Circuit traces for the digital outputs should be kept short and connect directly to the receiving gate. Internal circuitry buffers the outputs of the AD9042 ADC through a resistor network to eliminate the need to externally isolate the device from the receiving gate. EVALUATION BOARD The AD10242 evaluation board (see Figure 16) is designed to provide optimal performance for evaluation of the AD10242 analog-to-digital converter. The board encompasses everything needed to ensure the highest level of performance for evaluating the AD10242. Power to the analog supply pins is connected via banana jacks. The analog supply powers the crystal oscillator, the associated components and amplifiers, and the analog section of the AD10242. The digital outputs of the AD10242 are powered via Pin 1 of either J9 or J10 found on the digital interface con- nector. To power the evaluation board with one 5 V supply, a jumper wire is required from test point E1 to E4. Contact the factory if additional layout or applications assistance is required. Figure 16. Evaluation Board Mechanical Layout REV. D |
Similar Part No. - AD10242_17 |
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Similar Description - AD10242_17 |
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