SiP2800/01/02/03/04/05

Vishay Siliconix

New Product

www.vishay.com

6

Document Number: 72660

S-41623—Rev.C, 30-Aug-04

DETAILED PIN DESCRIPTION

COMP

COMP is the output of the Voltage Error Amplifier (VEA). The

VEA is a low output impedance operational amplifier, providing

the input to the PWM cycle-by-cycle current limit comparator.

As the SiP280X series of parts use a true operational amplifier

for the VEA, the COMP terminal can both source and sink

current. To add flexibility to these parts, the VEA is internally

current limited, which allows OUT to be forced to zero duty

cycle by taking the COMP pin to GND.

The voltage on COMP is passed through an internal diode to

develop an offset voltage of approximately 0.6 V, and then

through a resistive divider with a gain of 0.606-V/V, before

being presented to the control input of the cycle-by-cycle

current limit comparator. Clamping the COMP pin to less than

the diode’s forward voltage (i.e.,

<0.5 V) will command the

current loop to deliver 0 A, by holding the control input of the

cycle-by-cycle current comparator at 0 V. Similarly, the current

loop will command the maximum inductor current on each

cycle when COMP is at 2.25 V or greater, which drives the

control input of the cycle-by-cycle current comparator to 1 V

(since [2.25 V -- 0.6 V]

×0.606 V/V = 1 V).

The SiP280X series additionally features a built-in soft-start

function, which functions by clamping the output level of the

VEA to an internally generated voltage. This clamp will hold

at their proper levels. When these levels are appropriate for

circuit operation, the internal voltage will begin rising, at the

rate of 1 V/ms. This rising clamp level allows the voltage on the

COMP pin to rise, which in turn allows the voltage at the control

input of the cycle-by-cycle current comparator to increase. The

maximum soft-start interval occurs under conditions requiring

full duty cycle (50% or 100%, depending upon the part type),

and is given by the time required for the voltage on the

cycle-by-cycle current comparator’s control input to reach 1 V.

Since 1 V at the control input to the comparator requires that

the COMP pin be at 2.25 V, the maximum soft-start interval is

approximately 2.25 ms.

CS

Input to both the cycle-by-cycle and overcurrent fault current

sense

comparators.

The

cycle-by-cycle

current

limit

comparator is the mechanism by which the VEA’s output

voltage commands the level of inductor or transformer current

during a given “on” interval, thereby regulating the overall

circuit’s output. This comparator forms the inner loop of the two

loops used in current-mode regulation.

The overcurrent comparator has a trip threshold that is 50%

higher than that of the cycle-by-cycle comparator.

Under

normal operating conditions, this comparator will not trip: its

purpose is to provide enhanced protection of the power path

components during severe faults (e.g., a short circuit). If the

overcurrent comparator is tripped by a fault condition, it will

command the SiP280X to do a “full-cycle restart.” During this

restart, the power supply will be quickly driven to the “off” state,

and will be required to wait for five milliseconds (typical) before

restarting. When the supply does restart, it will do so using the

built-in soft-start function of the SiP280X.

The SiP280X family incorporates internal leading-edge

blanking on the CS pin, to keep any spurious voltages on the

CS pin from reaching the comparator inputs during the 100-ns

interval immediately following the rising edge on OUT (for

example, voltages due to capacitive charging currents).

Because of this internal leading-edge blanking, many

applications require no external RC filter on the CS input.

Compared to circuits requiring the use of an external RC filter

circuit, leading-edge blanking provides a shorter effective CS

to OUT propagation delay.

FB

FB is the inverting input of the VEA. Internally compared

avoid stability problems, keep lead lengths to FB as short as

possible, and use good layout practices to minimize the stray

capacitances of components connected to this pin.

GND

The GND pin is both the reference ground and the power

ground for this part.

OUT

OUT is the output of a high-current driver capable of peak

currents in excess of

750 mA. OUT is therefore well suited

to driving the gates of power MOSFETs. This pin is specifically

ensure a predictable system turn-on. Since the OUT pin is

internally connected to a low impedance CMOS buffer, it is

capable of rapid rail-to-rail transitions. This output topology

also mitigates the effects of undershoot and overshoot. For

this reason, external Schottky clamp diodes are generally not

required on this pin.

RC

GND. Due to the high impedances encountered in low power

control circuits, this connection must be a short and quiet

return to GND (preferably by means of a dedicated signal

trace, separated from all other circuit functions).

The oscillator frequency for the SiP280X family of parts is

approximated by the following formulas:

For the SiP2800, SiP2801, SiP2802, and SiP2804:

For the SiP2803 and SiP2805:

For the SiP2800, SiP2801, SiP2802 and SiP2804: