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IS61LV51216-8T Datasheet(PDF) 2 Page - Integrated Silicon Solution, Inc |
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IS61LV51216-8T Datasheet(HTML) 2 Page - Integrated Silicon Solution, Inc |
2 / 15 page 2 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 03/10/05 IS61LV51216 ISSI® TRUTH TABLE I/O PIN Mode WE WE WE WE WE CE CE CE CE CE OE OE OE OE OE LB LB LB LB LB UB UB UB UB UB I/O0-I/O7 I/O8-I/O15 VDD Current Not Selected X H X X X High-Z High-Z ISB1, ISB2 Output Disabled H L H X X High-Z High-Z ICC X L X H H High-Z High-Z Read H L L L H DOUT High-Z ICC H L L H L High-Z DOUT H LLLL DOUT DOUT Write L L X L H DIN High-Z ICC L L X H L High-Z DIN LL X L L DIN DIN PIN DESCRIPTIONS A0-A18 Address Inputs I/O0-I/O15 Data Inputs/Outputs CE Chip Enable Input OE Output Enable Input WE Write Enable Input LB Lower-byte Control (I/O0-I/O7) UB Upper-byte Control (I/O8-I/O15) NC No Connection VDD Power GND Ground 44-Pin TSOP (Type II) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A0 A1 A2 A3 A4 CE I/O0 I/O1 I/O2 I/O3 VDD GND I/O4 I/O5 I/O6 I/O7 WE A5 A6 A7 A8 A9 A17 A16 A15 OE UB LB I/O15 I/O14 I/O13 I/O12 GND VDD I/O11 I/O10 I/O9 I/O8 A18 A14 A13 A12 A11 A10 PIN CONFIGURATIONS |
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