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ICPL4502 Datasheet(PDF) 3 Page - List of Unclassifed Manufacturers

Part No. ICPL4502
Description  HIGH SPEED, NON BASE LEAD OPTICALLY COUPLED ISOLATOR PHOTOTRANSISTOR OUTPUT
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Maker  ETC [List of Unclassifed Manufacturers]
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ICPL4502 Datasheet(HTML) 3 Page - List of Unclassifed Manufacturers

   
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SWITCHING SPECIFICATIONS AT T
A = 25°C ( VCC = 5V, IF = 16mA Unless otherwise noted )
PARAMETER
SYM DEVICE
MIN TYP MAX UNITS
TEST CONDITION
0.2
0.8
µs
R
L = 1.9kΩ,( note 8 )
Το Logic Low at Output ( fig 1 )
Propagation Delay Time
t
PLH
0.2
0.8
µs
R
L = 1.9kΩ,( note 8 )
Το Logic High at Output ( fig 1)
Common Mode Transient
Immunity at Logic High
CM
H
10000
V/
µs
I
F = 0mA, VCM = 10VPP
Level Output ( fig 2 )
R
L = 1.9kΩ,(note 7,8 )
Common Mode Transient
Immunity at Logic Low
CM
L
-10000
V/
µs
V
CM = 10VPP
Level Output ( fig 2 )
R
L = 1.9kΩ,(note 7,8 )
Bandwidth
BW
2
MHz
R
L = 100Ω, (note 9 )
NOTES:-
1.
Derate linearly above 70oC free air temperature at a rate of 0.8 mA/°C.
2.
Derate linearly above 70oC free air temperature at a rate of 1.6 mA/°C.
3.
Derate linearly above 70oC free air temperature at a rate of 0.9 mW/°C.
4.
Derate linearly above 70oC free air temperature at a rate of 1.0 mW/°C.
5.
CURRENT TRANSFER RATIO is defined as the ratio of output collector current,I
O , to the forward LED
input current, I
F times 100%.
6.
Device considered a two-terminal device: pins 1,2,3, and 4 shorted together and pins 5,6,7 and 8 shorted
together.
7.
Common mode transient immunity in Logic High level is the maximum tolerable (positive) dVcm/dt on
the leading edge of the common mode pulse V
CM to assure that the output will remain in a Logic High
state (i.e. V
O > 2.0V).
Common mode transient immunity in Logic Low level is the maximum tolerable
(negative) dVcm/dt on the trailing edge of the common mode pulse signal, V
CM to assure that the output
will remain in Logic Low state (i.e. V
O< 0.8V).
8.
The 1.9k
Ω load represents 1 TTL unit load of 1.6mA and the 5.6kΩ pull-up resistor.
9.
The frequency at which the a.c. output voltage is 3dB below the low frequency asymptote.
Propagation Delay Time
t
PHL
FIG.1 SWITCHING TEST CIRCUIT
2
I
F Monitor
0
I
F
V
O
1.5V
100
1.5V
5V
t
PHL
t
PLH
V
OL
R
L
V
O
C
L = 15pF
8
7
6
5
PULSE
GENERATOR
Z
O = 50Ω
t
r = 5ns
I
F
1
4
3
10% Duty Cycle
1/f < 100
µs
5V
DB91008-AAS/A2
7/12/00


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