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AD9254 Datasheet(PDF) 4 Page - Analog Devices |
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AD9254 Datasheet(HTML) 4 Page - Analog Devices |
4 / 41 page AD9254 Rev. 0 | Page 3 of 40 SPECIFICATIONS DC SPECIFICATIONS AVDD = 1.8 V; DRVDD = 2.5 V, maximum sample rate, 2 V p-p differential input, 1.0 V internal reference; AIN = −1.0 dBFS, DCS enabled, unless otherwise noted. Table 1. AD9254BCPZ-150 Parameter Temperature Min Typ Max Unit RESOLUTION Full 14 Bits ACCURACY No Missing Codes Full Guaranteed Offset Error Full ±0.3 ±0.8 % FSR Gain Error Full ±0.6 ±4.5 % FSR Differential Nonlinearity (DNL)1 25°C ±0.4 LSB Full ±1.0 LSB Integral Nonlinearity (INL)1 25°C ±1.5 LSB Full ±5.0 LSB TEMPERATURE DRIFT Offset Error Full ±15 ppm/°C Gain Error Full ±95 ppm/°C INTERNAL VOLTAGE REFERENCE Output Voltage Error (1 V Mode) Full ±5 ±35 mV Load Regulation @ 1.0 mA Full 7 mV INPUT REFERRED NOISE VREF = 1.0 V 25°C 1.3 LSB rms ANALOG INPUT Input Span, VREF = 1.0 V Full 2 V p-p Input Capacitance2 Full 8 pF REFERENCE INPUT RESISTANCE Full 6 kΩ POWER SUPPLIES Supply Voltage AVDD Full 1.7 1.8 1.9 V DRVDD Full 1.7 2.5 3.6 V Supply Current IAVDD1 Full 240 260 mA IDRVDD1(DRVDD = 1.8 V) Full 11 mA IDRVDD1 (DRVDD = 3.3 V) Full 23 mA POWER CONSUMPTION DC Input Full 430 470 mW Sine Wave Input1 (DRVDD = 1.8 V) Full 450 mW Sine Wave Input1 (DRVDD = 3.3 V) Full 506 mW Standby Power3 Full 40 mW Power-Down Power Full 1.8 mW 1 Measured with a low input frequency, full-scale sine wave, with approximately 5 pF loading on each output bit. 2 Input capacitance refers to the effective capacitance between one differential input pin and AGND. Refer to Figure 4 for the equivalent analog input structure. 3 Standby power is measured with a dc input, the CLK pin inactive (set to AVDD or AGND). |
Similar Part No. - AD9254_17 |
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Similar Description - AD9254_17 |
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