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AT40K05-2DQC Datasheet(PDF) 66 Page - ATMEL Corporation |
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AT40K05-2DQC Datasheet(HTML) 66 Page - ATMEL Corporation |
66 / 67 page 66 AT40K/AT40KLV Series FPGA 0896C–FPGA–04/02 352C1 – SBGA 2325 Orchard Parkway San Jose, CA 95131 TITLE DRAWING NO. R REV. 3/29/02 352C1, 352-ball, 35 x 35, Enhanced, Low-profile Square Ball Grid Array Package (SBGA) 352C1 A Top View Section View Bottom View Die Side A1 BALL I.D. A1 BALL CORNER SEATING PLANE b ∅ A1 BALL CORNER e e Side View 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 A B C D E F G H J K L M N P R T U V W Y AA AB AC AD AE AF E D A1 AA2 COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE D 35.0 BSC E 35.0 BSC Matrix Size 26 x 26 A –– 1.70 A1 0.35 –– A2 0.25 – 1.10 b ∅ 0.60 0.75 0.90 e 1.27 BSC Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-192, Variation BAR-2, for additional information. 2. JEDEC variations are based on fully populated ball arrays. Arrays can be depopulated as desired by removing balls from the fully populated array. |
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