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AT49F002 Datasheet(PDF) 4 Page - ATMEL Corporation

Part No. AT49F002
Description  2-megabit (256K x 8) 5-volt Only Flash Memory
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT49F002 Datasheet(HTML) 4 Page - ATMEL Corporation

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A RESET input pin is provided to ease some system applications. When RESET is at a logic
high level, the device is in its standard operating mode. A low level on the RESET input halts the
present device operation and puts the outputs of the device in a high impedance state. If the
RESET pin makes a high to low transition during a program or erase operation, the operation
may not be successfully completed and the operation will have to be repeated after a high level
is applied to the RESET pin. When a high level is reasserted on the RESET pin, the device
returns to the read or standby mode, depending upon the state of the control inputs. By applying
a 12V ± 0.5V input signal to the RESET pin, the boot block array can be reprogrammed even if
the boot block lockout feature has been enabled (see Boot Block Programming Lockout Over-
ride section). The RESET feature is not available for the AT49F002AN(T).
Before a byte can be reprogrammed, the main memory block or parameter block which contains
the byte must be erased. The erased state of the memory bits is a logical “1”. The entire device
can be erased at one time by using a 6-byte software code. The software chip erase code con-
sists of 6-byte load commands to specific address locations with a specific data pattern (please
refer to the Chip Erase Cycle Waveforms).
After the software chip erase has been initiated, the device will internally time the erase opera-
tion so that no external clocks are required. The maximum time needed to erase the whole chip
is tEC. If the boot block lockout feature has been enabled, the data in the boot sector will not be
Chip Erase
If the boot block lockout has been enabled, the Chip Erase function will erase Parameter
Block 1, Parameter Block 2, Main Memory Block 1-4 but not the boot block. If the Boot Block
Lockout has not been enabled, the Chip Erase function will erase the entire chip. After the full
chip erase the device will return back to read mode. Any command during chip erase will be
Sector Erase
As an alternative to a full chip erase, the device is organized into sectors that can be individually
erased. There are two 8K-byte parameter block sections and four main memory blocks. The 8K-
byte parameter block sections and the four main memory blocks can be independently erased
and reprogrammed. The Sector Erase command is a six bus cycle operation. The sector
address is latched on the falling WE edge of the sixth cycle while the 30H data input command is
latched at the rising edge of WE. The sector erase starts after the rising edge of WE of the sixth
cycle. The erase operation is internally controlled; it will automatically time to completion.

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