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AD4000 Datasheet(PDF) 34 Page - Analog Devices

Part # AD4000
Description  Precision, Pseudo Differential, SAR ADCs
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD4000 Datasheet(HTML) 34 Page - Analog Devices

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AD4000/AD4004/AD4008
Data Sheet
Rev. C | Page 34 of 36
DAISY-CHAIN MODE
Use this mode to daisy-chain multiple AD4000/AD4004/AD4008
devices on a 3-wire or 4-wire serial interface. This feature is
useful for reducing component count and wiring connections,
for example, in isolated multiconverter applications or for
systems with a limited interfacing capacity. Data readback is
analogous to clocking a shift register.
A connection diagram example using two AD4000/AD4004/
AD4008 devices is shown in Figure 62, and the corresponding
timing diagram is shown in Figure 63.
When SDI and CNV are low, SDO is driven low. With SCK low,
a rising edge on CNV initiates a conversion, selects daisy-chain
mode, and disables the busy indicator. In this mode, CNV is
held high during the conversion phase and the subsequent data
readback.
When the conversion is complete, the MSB is output onto SDO,
and the AD4000/AD4004/AD4008 enter the acquisition phase
and power down. The remaining data bits stored in the internal
shift register are clocked out of SDO by subsequent SCK falling
edges. For each ADC, SDI feeds the input of the internal shift
register and is clocked by the SCK rising edges. Each ADC in
the daisy-chain outputs its data MSB first, and 16 × N clocks are
required to read back the N ADCs. The data is valid on both
SCK edges. The maximum conversion rate is reduced because of
the total readback time.
It is possible to write to each ADC register in daisy-chain mode.
The timing diagram is shown in Figure 48. This mode requires
4-wire operation because data is clocked in on the SDI line with
CNV held low. The same command byte and register data can
be shifted through the entire chain to program all ADCs in the
chain with the same register contents, which requires 8 × (N + 1)
clocks for N ADCs. It is possible to write different register contents
to each ADC in the chain by writing to the furthest ADC in the
chain first, using 8 × (N + 1) clocks, and then the second furthest
ADC with 8 × N clocks, and so forth until reaching the nearest
ADC in the chain, which requires 16 clocks for the command
and register data. It is not possible to read register contents in
daisy-chain mode; however, the six status bits can be enabled if
the user wants to determine the ADC configuration. Note that
enabling the status bits requires six extra clocks to clock out the
ADC result and the status bits per ADC in the chain. Turbo
mode cannot be used in daisy-chain mode.
CONVERT
DATA IN
CLK
DIGITAL HOST
DEVICE B
DEVICE A
AD4000/
AD4004/
AD4008
SDI
SDO
CNV
SCK
AD4000/
AD4004/
AD4008
SDI
SDO
CNV
SCK
Figure 62. Daisy-Chain Mode, Connection Diagram
SDOA = SDIB
DA15
DB15
DB14
DB13
DA14
DA13
DA1
DA0
DA1
DA0
DB1
DB0
SCK
1
2
3
30
31
32
tSSDISCK
tHSDISCK
CONVERSION
ACQUISITION
tCONV
tCYC
tACQ
ACQUISITION
CNV
14
15
tSCK
tSCKL
tSCKH
17
18
16
SDIA = 0
SDOB
DA15
DA14
tHSDO
tDSDO
tQUIET2
tHSCKCNV
tDIS
tQUIET2
tEN
Figure 63. Daisy-Chain Mode, Serial Interface Timing Diagram


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