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LTC3831 Datasheet(PDF) 11 Page - Linear Technology

Part # LTC3831
Description  High Power Synchronous Switching Regulator Controller for DDR Memory Termination
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC3831 Datasheet(HTML) 11 Page - Linear Technology

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LTC3831
3831f
APPLICATIO S I FOR ATIO
decrease in ramp amplitude increases the open-loop gain
of the controller feedback loop. As a result, the loop
crossover frequency increases and it may cause the feed-
back loop to be unstable if the phase margin is insufficient.
To overcome this problem, the LTC3831 monitors the
peak voltage of the ramp signal and adjust the oscillator
charging current to maintain a constant ramp peak.
Input Supply Considerations/Charge Pump
The LTC3831 requires four supply voltages to operate: VIN
for the main power input, PVCC1 and PVCC2 for MOSFET
gate drive and a clean, low ripple VCC for the LTC3831
internal circuitry (Figure 5).
In many applications, VCC can be powered from VIN
through an RC filter. This supply can be as low as 3V. The
low quiescent current (typically 800
µA) allows the use of
relatively large filter resistors and correspondingly small
filter capacitors. 100
Ω and 4.7µF usually provide ad-
equate filtering for VCC. For best performance, connect the
4.7
µF bypass capacitor as close to the LTC3831 VCC pin as
possible.
Gate drive for the top N-channel MOSFET Q1 is supplied
from PVCC1. This supply must be above VIN (the main
power supply input) by at least one power MOSFET
VGS(ON) for efficient operation. An internal level shifter
allows PVCC1 to operate at voltages above VCC and VIN, up
to 14V maximum. This higher voltage can be supplied with
a separate supply, or it can be generated using a charge
pump.
Gate drive for the bottom MOSFET Q2 is provided through
PVCC2. This supply only need to be above the power
MOSFET VGS(ON) for efficient operation. PVCC2 can also be
driven from the same supply/charge pump for the PVCC1,
or it can be connected to a lower supply to improve
efficiency.
Figure 6 shows a doubling charge pump circuit that can be
used to provide 2VIN gate drive for Q1. The charge pump
consists of a Schottky diode from VIN to PVCC1 and a 0.1µF
capacitor from PVCC1 to the switching node at the drain of
Figure 4. External Synchronization Operation
SHDN
200kHz
FREE RUNNING
RAMP SIGNAL
TRADITIONAL
SYNC METHOD
WITH EARLY
RAMP
TERMINATION
LTC3831
KEEPS RAMP
AMPLITUDE
CONSTANT
UNDER SYNC
RAMP SIGNAL
WITH EXT SYNC
RAMP AMPLITUDE
ADJUSTED
3831 F04
Figure 5. Supplies Input
Figure 6. Doubling Charge Pump
3831 F05
+
VCC
PVCC2
PVCC1
VIN
TG
Q1
COUT
VOUT
Q2
LO
BG
INTERNAL
CIRCUITRY
LTC3831
LTC3831
3831 F06a
+
DZ
12V
1N5242
Q1
LO
Q2
COUT
VOUT
0.1
µF
PVCC2
OPTIONAL
USE FOR VIN ≥ 7V
MBR0530T1
PVCC1
TG
BG
VIN


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