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IS61LV256-8TI Datasheet(PDF) 4 Page - Integrated Circuit Solution Inc |
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IS61LV256-8TI Datasheet(HTML) 4 Page - Integrated Circuit Solution Inc |
4 / 8 page IS61LV256 4 Integrated Circuit Solution Inc. SR004-0D AC TEST LOADS .igure 1. .igure 2. AC TEST CONDITIONS Parameter Unit Input Pulse Level 0V to 3.0V Input Rise and .all Times 3 ns Input and Output Timing 1.5V and Reference Levels Output Load See .igures 1 and 2 READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range) -8 ns -10 ns -12 ns -15 ns -20 ns Symbol Parameter Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit tRC Read Cycle Time 8 10 12 15 20 ns tAA Address Access Time 8 10 12 15 20 ns tOHA Output Hold Time 2 2 2 2 2 ns tACE CE Access Time 8 10 12 15 20 ns tDOE OE Access Time 4 5 6 7 8 ns tLZOE OE to Low-Z Output 0 0 0 0 0 ns tHZOE OE to High-Z Output 4 5 5 6 6 ns tLZCE CE to Low-Z Output 3 3 3 3 3 ns tHZCE CE to High-Z Output 4 5 6 7 7 ns tPU! CE to Power-Up 0 0 0 0 0 ns tPD" CE to Power-Down 8 10 12 15 20 ns Notes: 1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and output loading specified in .igure 1. 2. Tested with the load in .igure 2. Transition is measured ±200 mV from steady-state voltage. Not 100% tested. 3. Not 100% tested. 319 Ω 30 pF Including jig and scope 353 Ω OUTPUT 3.3V 319 Ω 5 pF Including jig and scope 353 Ω OUTPUT 3.3V |
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