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TDA3MVDBABFQ1 Datasheet(PDF) 4 Page - Texas Instruments

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Part # TDA3MVDBABFQ1
Description  SoC for Advanced Driver Assistance Systems (ADAS) 15mm Package (ABF) Silicon Revision 2.0
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TDA3MVDBABFQ1 Datasheet(HTML) 4 Page - Texas Instruments

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TDA3MV, TDA3MA
TDA3LX, TDA3LA
SPRS964C – JUNE 2016 – REVISED JULY 2017
www.ti.com
Submit Documentation Feedback
Product Folder Links: TDA3MV TDA3MA TDA3LX TDA3LA
Table of Contents
Copyright © 2016–2017, Texas Instruments Incorporated
Table of Contents
1
Device Overview
......................................... 1
1.1
Features
............................................. 1
1.2
Applications
........................................... 2
1.3
Description
............................................ 2
1.4
Functional Block Diagram
........................... 3
2
Revision History
......................................... 5
3
Device Comparison
..................................... 6
3.1
Device Comparison Table
............................ 6
4
Terminal Configuration and Functions
.............. 8
4.1
Terminal Assignment
................................. 8
4.2
Ball Characteristics
................................... 9
4.3
Multiplexing Characteristics
......................... 40
4.4
Signal Descriptions
.................................. 51
5
Specifications
.......................................... 75
5.1
Absolute Maximum Ratings
......................... 75
5.2
ESD Ratings
........................................ 76
5.3
Power on Hour (POH) Limits
........................ 76
5.4
Recommended Operating Conditions
............... 77
5.5
Operating Performance Points
...................... 79
5.6
Power Consumption Summary
...................... 88
5.7
Electrical Characteristics
............................ 88
5.8
Thermal Characteristics
............................. 95
5.9
Analog-to-Digital ADC Subsystem Electrical
Specifications
........................................ 96
5.10
Power Supply Sequences
........................... 98
6
Clock Specifications
................................. 101
6.1
Input Clock Specifications
......................... 102
6.2
DPLLs, DLLs Specifications
....................... 107
7
Timing Requirements and Switching
Characteristics
........................................ 111
7.1
Timing Test Conditions
............................ 111
7.2
Interface Clock Specifications
..................... 111
7.3
Timing Parameters and Information
............... 111
7.4
Video Input Ports (VIP)
............................ 113
7.5
Display Subsystem – Video Output Ports
......... 115
7.6
Imaging Subsystem (ISS)
.......................... 117
7.7
External Memory Interface (EMIF)
................. 118
7.8
General-Purpose Memory Controller (GPMC)
..... 118
7.9
General-Purpose Timers
........................... 139
7.10
Inter-Integrated Circuit Interface (I2C)
............. 139
7.11
Universal Asynchronous Receiver Transmitter
(UART)
............................................. 142
7.12
Multichannel Serial Peripheral Interface (McSPI)
. 144
7.13
Quad Serial Peripheral Interface (QSPI)
.......... 150
7.14
Multichannel Audio Serial Port (McASP)
.......... 155
7.15
Controller Area Network Interface (DCAN and
MCAN)
............................................. 161
7.16
Ethernet Interface (GMAC_SW)
................... 163
7.17
SDIO Controller
.................................... 167
7.18
General-Purpose Interface (GPIO)
................ 172
7.19
Test Interfaces
..................................... 173
8
Applications, Implementation, and Layout
...... 176
8.1
Introduction
........................................ 176
8.2
Power Optimizations
............................... 177
8.3
Core Power Domains
.............................. 188
8.4
Single-Ended Interfaces
........................... 196
8.5
Differential Interfaces
.............................. 199
8.6
Clock Routing Guidelines
.......................... 201
8.7
LPDDR2 Board Design and Layout Guidelines
.... 202
8.8
DDR2 Board Design and Layout Guidelines
....... 211
8.9
DDR3 Board Design and Layout Guidelines
....... 223
8.10
CVIDEO/SD-DAC Guidelines and Electrical
Data/Timing
........................................ 246
9
Device and Documentation Support
.............. 248
9.1
Device Nomenclature & Orderable Information
.... 248
9.2
Tools and Software
................................ 250
9.3
Documentation Support
............................ 251
9.4
Receiving Notification of Documentation Updates
. 251
9.5
Related Links
...................................... 251
9.6
Community Resources
............................. 252
9.7
Trademarks
........................................ 252
9.8
Electrostatic Discharge Caution
................... 252
9.9
Export Control Notice
.............................. 252
9.10
Glossary
............................................ 252
10
Mechanical Packaging Information
............... 253
10.1
Mechanical Data
................................... 253


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