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TDA3X Datasheet(PDF) 91 Page - Texas Instruments |
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TDA3X Datasheet(HTML) 91 Page - Texas Instruments |
91 / 256 page 91 TDA3MV, TDA3MA TDA3LX, TDA3LA www.ti.com SPRS964C – JUNE 2016 – REVISED JULY 2017 Submit Documentation Feedback Product Folder Links: TDA3MV TDA3MA TDA3LX TDA3LA Specifications Copyright © 2016–2017, Texas Instruments Incorporated (1) VDDS in this table stands for corresponding power supply (i.e. vdds_ddr1 or vdds_ddr2). For more information on the power supply name and the corresponding ball, see POWER column. 5.7.2 Dual Voltage LVCMOS I2C DC Electrical Characteristics Table 5-11 summarizes the DC electrical characteristics for Dual Voltage LVCMOS I2C Buffers. NOTE For more information on the I/O cell configurations, see the Control Module section of the Device TRM. Table 5-11. Dual Voltage LVCMOS I2C DC Electrical Characteristics PARAMETER MIN NOM MAX UNIT Signal Names in MUXMODE 0: i2c2_scl; i2c1_scl; i2c1_sda; i2c2_sda; Balls ABF: L3, L4, L6, L5; I2C Standard Mode – 1.8 V VIH Input high-level threshold 0.7*VDDS V VIL Input low-level threshold 0.3*VDDS V Vhys Hysteresis 0.1*VDDS V II Input current at each I/O pin with an input voltage between 0.1*VDDS to 0.9*VDDS 12 µA IOZ IOZ(IPAD Current) at each IO pin. PAD is swept from 0 to VDDS and the Max(I(PAD)) is measured and is reported as IOZ 12 µA CI Input capacitance 10 pF VOL3 Output low-level threshold open-drain at 3-mA sink current 0.2*VDDS V IOLmin Low-level output current @VOL=0.2*VDDS 3 mA tOF Output fall time from VIHmin to VILmax with a bus capacitance CB from 5 pF to 400 pF 250 ns I2C Fast Mode – 1.8 V VIH Input high-level threshold 0.7*VDDS V VIL Input low-level threshold 0.3*VDDS V Vhys Hysteresis 0.1*VDDS V II Input current at each I/O pin with an input voltage between 0.1*VDDS to 0.9*VDDS 12 µA IOZ IOZ(IPAD Current) at each IO pin. PAD is swept from 0 to VDDS and the Max(I(PAD)) is measured and is reported as IOZ 12 µA CI Input capacitance 10 pF VOL3 Output low-level threshold open-drain at 3-mA sink current 0.2*VDDS V IOLmin Low-level output current @VOL=0.2*VDDS 3 mA tOF Output fall time from VIHmin to VILmax with a bus capacitance CB from 10 pF to 400 pF 20+0.1*Cb 250 ns I2C Standard Mode – 3.3 V VIH Input high-level threshold 0.7*VDDS V VIL Input low-level threshold 0.3*VDDS V Vhys Hysteresis 0.05*VDD S V II Input current at each I/O pin with an input voltage between 0.1*VDDS to 0.9*VDDS 31 80 µA IOZ IOZ(IPAD Current) at each IO pin. PAD is swept from 0 to VDDS and the Max(I(PAD)) is measured and is reported as IOZ 31 80 µA CI Input capacitance 10 pF VOL3 Output low-level threshold open-drain at 3-mA sink current 0.4 V IOLmin Low-level output current @VOL=0.4V 3 mA |
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