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IC-LTA Datasheet(PDF) 11 Page - IC-Haus GmbH

Part # IC-LTA
Description  6-CH. INCREMENTAL OPTO ENCODER ARRAY
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Manufacturer  ICHAUS [IC-Haus GmbH]
Direct Link  http://www.ichaus.biz
Logo ICHAUS - IC-Haus GmbH

IC-LTA Datasheet(HTML) 11 Page - IC-Haus GmbH

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preliminary
preliminary
iC-LTA
6-CH. INCREMENTAL OPTO ENCODER ARRAY
Rev C1, Page 11/15
DIGITAL OUTPUT SIGNALS
T
T/4
T/4
T/4
T/4
PA
PB
PZ
U
V
W
C/6
C/6
C/6
C/6
C/6
C/6
C
ö
PZ
PZ
AB-gated
B-gated
ungated
Figure 4: Typical encoder quadrature and motor
commutation signals.
iC-LTA’s photo-sensor array requires an external reticle
(placed either on side of the IC or on side of the LED),
and thus allows for a free definition of the optical ra-
dius and cycles per revolution for the A and B encoder
quadrature signals.
The pulse count, period length and phase shift for the
U, V, W commutation signals is also determined by the
code disc design.
Contracted code disc designs and IC packaging with
custom reticle can be offered on request; contact
iC-Haus for details.
ANALOG OUTPUT SIGNALS
VCC
U
PB
PA
PZ
R1
R2
GND
T1
SEL
Figure 5: Example of analog ABZ / analog UVW
(pin SEL = 50% VCC)
VCC
U
PA
PB
PZ
R1
R2
GND
T1
SEL
Figure 6: Example of analog ABZ / digital UVW
(pin SEL = 75% VCC)
iC-LTA features 5 principle operation modes which are
selectable by the voltage applied to pin SEL. A voltage
divider as suggested by Table 4 is the easiest way to
obtain this.
SEL
R11)
R21)
Operation Mode
100 % VCC
0 Ω
open
x2 interpolated
75 % VCC 2.7 kΩ 8.2 kΩ analog ABZ, dig. UVW
50 % VCC 4.7 kΩ 4.7 kΩ all analog
(open) (open)
25 % VCC 8.2 kΩ 2.7 kΩ x4 interpolated
0 % VCC
open
0Ω
x1 comparated
1) Exemplary values.
Table 4: Selection of operation mode by pin SEL.
If input SEL is left open, the IC biases its input at
50% VCC and analog output signals are available for
test and alignment.
Analog output signals may also be used to increase
the encoder’s resolution by connecting an external in-
terpolation IC. In this case the analog signals are re-
quired permanently, so that noise immunity should be
improved by wiring pin SEL to an external reference
providing VCC/2.
Setting 75 % VCC may be considered to obtain analog
signals at PA/PB/PZ and NA/NB/NZ outputs feeding
the external interpolation IC, together with digital sig-
nals at U/V/W directly connecting a line driver. Special
attention to the PCB layout should be paid to avoid
cross talk; analog and digital lines should be separated
carefully.


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