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Z53C80 Datasheet(PDF) 29 Page - Zilog, Inc. |
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Z53C80 Datasheet(HTML) 29 Page - Zilog, Inc. |
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29 / 40 page  29 Z53C80 SCSI ZILOG PS97SCC0200 AC CHARACTERISTICS DMA Read (Non-Block Mode) Initiator Receive Table Name Description Min Max Units 1 DRQ False from /DACK True 60 ns 2 /DACK False to DRQ True 30 ns 3 /DACK Hold Time from End of /IOR 0 ns 4 Data Access Time from Read Enable [1] 70 ns 5 Data Hold Time from End of /IOR 10 ns 6 Width of /EOP Pulse [2] 50 ns 7 /REQ True to DRQ True 70 ns 8 /REQ True to /ACK True 90 ns 9 /REQ False to /ACK False (/DACK False) 80 ns 10 /DACK False to /ACK False (/REQ False) 90 ns 11 DATA Setup Time to /REQ 20 ns 12 DATA Hold Time from /REQ True 50 ns Notes: [1] Read enable is the occurrence of both /IOR and /DACK. [2] /EOP, /IOR and /DACK must be concurrently true for at least T6 for proper recognition of the /EOP pulse. |
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