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SN74LVC2G38 Datasheet(PDF) 1 Page - Texas Instruments

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Part No. SN74LVC2G38
Description  DUAL 2 INPUT NAND GATE WITH OPEN DRAIN OUTPUT
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

SN74LVC2G38 Datasheet(HTML) 1 Page - Texas Instruments

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SN74LVC2G38
DUAL 2INPUT NAND GATE
WITH OPEN DRAIN OUTPUT
SCES554A − MARCH 2004 − REVISED OCTOBER 2004
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Available in the Texas Instruments
NanoStar
 and NanoFree Packages
D Supports 5-V VCC Operation
D Inputs Accept Voltages to 5.5 V
D Max tpd of 4 ns at 3.3 V
D Low Power Consumption, 10-µA Max ICC
D ±24-mA Output Drive at 3.3 V
D Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
D Typical VOHV (Output VOH Undershoot)
>2 V at VCC = 3.3 V, TA = 25°C
D Ioff Supports Partial-Power-Down Mode
Operation
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
description/ordering information
The SN74LVC2G38 is designed for 1.65-V to 5.5-V VCC operation.
This device is a dual two-input NAND buffer gate with open-drain outputs. It performs the Boolean function
Y = A
• B or Y = A + B in positive logic.
NanoStar
 and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING‡
NanoStar
 − WCSP (DSBGA)
0.23-mm Large Bump − YEP
Reel of 3000
SN74LVC2G38YEPR
_ _ _D7_
−40
°C to 85°C
NanoFree
 − WCSP (DSBGA)
0.23-mm Large Bump − YZP (Pb-free)
Reel of 3000
SN74LVC2G38YZPR
_ _ _D7_
−40
°C to 85°C
SSOP − DCT
Reel of 3000
SN74LVC2G38DCTR
C38_ _ _
VSSOP − DCU
Reel of 3000
SN74LVC2G38DCUR
C38_
VSSOP − DCU
Reel of 250
SN74LVC2G38DCUT
C38_
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
‡ DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition
(1 = SnPb,
= Pb-free).
Copyright
 2004, Texas Instruments Incorporated
DCT OR DCU PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
1A
1B
2Y
GND
VCC
1Y
2B
2A
4
3
2
1
5
6
7
8
GND
2Y
1B
1A
2A
2B
1Y
VCC
YEP OR YZP PACKAGE
(BOTTOM VIEW)
NanoStar and NanoFree are trademarks of Texas Instruments.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.


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