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RT9818F-12GVL Datasheet(PDF) 4 Page - Richtek Technology Corporation |
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RT9818F-12GVL Datasheet(HTML) 4 Page - Richtek Technology Corporation |
4 / 14 page RT9818 4 DS9818-11 August 2016 www.richtek.com © Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured at TA = 25°C on a low effective thermal conductivity single-layer test board per JEDEC 51-3. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. The voltage VOL can be calculated by VOL = VDD − Ir * R. Where R is the pull-up resistor and Ir is the current flowing through the pull-up resistor. For typical application (R=100k Ω), VOL is less than 0.2V. |
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