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XR-2211ACP Datasheet(PDF) 5 Page - Exar Corporation |
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XR-2211ACP Datasheet(HTML) 5 Page - Exar Corporation |
5 / 24 page XR-2211A 5 Rev. 1.01 DC ELECTRICAL CHARACTERISTICS (Cont.) Test Conditions: VCC = 12V, TA = +25°C, RO = 30KW, CO = 0.033mF, unless otherwise specified. Parameter Min. Typ. Max. Unit Conditions Voltage Comparator Section Input Impedance 2 M W Measured at pins 3 and 8 Input Bias Current 100 nA Voltage Gain 55 70 dB RL = 5.1KW Output Voltage Low 300 500 mV IC = 3mA Output Leakage Current 0.01 10 mA VO = 20V Internal Reference Voltage Level 4.75 5.3 5.85 V Measured at pin 10 Output Impedance 100 W AC Small Signal Maximum Source Current 80 mA Note: - These parameters, although guaranteed over the recommended operating conditions, are not 100% tested in production. - Bold face parameters are covered by production test. Specifications are subject to change without notice ABSOLUTE MAXIMUM RATINGS Power Supply 20V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input Signal Level 3V rms . . . . . . . . . . . . . . . . . . . . . . . . Power Dissipation 900mW . . . . . . . . . . . . . . . . . . . . . . . Plastic Package 800mW . . . . . . . . . . . . . . . . . . . . . . . . . Derate Above TA = +25°C 6mW/ °C . . . . . . . . JEDEC SOIC 390mW . . . . . . . . . . . . . . . . . . . . . . . . . . Derate Above TA = +25°C 5mW/ °C . . . . . . . . . SYSTEM DESCRIPTION The main PLL within the XR-2211A is constructed from an input preamplifier, analog multiplier used as a phase detector and a precision voltage controlled oscillator (VCO). The preamplifier is used as a limiter such that input signals above typically 10mV RMS are amplified to a constant high level signal. The multiplying-type phase detector acts as a digital exclusive or gate. Its output (unfiltered) produces sum and difference frequencies of the input and the VCO output. The VCO is actually a current controlled oscillator with its normal input current (fO) set by a resistor (R0) to ground and its driving current with a resistor (R1) from the phase detector. The output of the phase detector produces sum and difference of the input and the VCO frequencies (internally connected). When in lock, these frequencies are fIN+ fVCO (2 times fIN when in lock) and fIN - fVCO (0Hz when lock). By adding a capacitor to the phase detector output, the 2 times fIN component is reduced, leaving a DC voltage that represents the phase difference between the two frequencies. This closes the loop and allows the VCO to track the input frequency. The FSK comparator is used to determine if the VCO is driven above or below the center frequency (FSK comparator). This will produce both active high and active low outputs to indicate when the main PLL is in lock (quadrature phase detector and lock detector comparator). |
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Similar Description - XR-2211ACP |
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