S-24C16C H Series

17

7. 2 Random read

Random read is used to read the data at an arbitrary memory address.

A dummy write is performed to load the memory address into the address counter.

When the S-24C16C receives a 7-bit device address and a 1-bit read / write instruction code set to "0" following a

start condition, it responds with an acknowledge.

And the S-24C16C receives 8-bit word address and responds with an acknowledge. The memory address is

loaded to the address counter in the S-24C16C by these operations. Reception of write data does not follow in a

dummy write whereas reception of write data follows in byte write and in page write.

Since the memory address is loaded into the memory address counter by dummy write, the master device can

read the data starting from the arbitrary memory address by transmitting a new start condition and performing the

same operation in the current address read.

That is, when the S-24C16C receives a 7-bit device address and a 1-bit read / write instruction code set to "1",

following a start condition signal, it responds with an acknowledge. Next, 8-bit data is transmitted from the

S-24C16C in synchronous to the SCL clock. The master device outputs stop condition not an acknowledge, the

reading of the S-24C16C is ended.

SDA

LINE

S

T

A

R

T

1 0 1 0

W

R

I

T

E

DEVICE

ADDRESS

WORD ADDRESS (n)

R

/

W

M

S

B

P2 P1 P0

A

C

K

L

S

B

W7 W6 W5 W4 W3 W2 W1 W0

A

C

K

0

DUMMY WRITE

S

T

O

P

S

T

A

R

T

1 0 1 0

R

E

A

D

DEVICE

ADDRESS

R

/

W

M

S

B

X X X

A

C

K

L

S

B

1

NO ACK from

Master Device

DATA

D7 D6 D5 D4 D3 D2 D1 D0

Figure 17 Random Read