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TAS5101IDAP Datasheet(PDF) 9 Page - Texas Instruments |
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TAS5101IDAP Datasheet(HTML) 9 Page - Texas Instruments |
9 / 14 page TAS5101 SLES039 – JUNE 2002 9 www.ti.com recommended operating conditions (nominal output power = 2 × 15 W (RMS), TA = 25°C) thermal data† PARAMETER MIN NOM MAX UNIT Shutdown junction temperature, TJ(SD) 150 °C Warning junction temperature, TJ(W) 125 °C Operating ambient temperature TA Commercial 0 25 70 °C Operating ambient temperature, TA Industrial –40 25 85 °C Thermal resistance junction-to-ambient, θja 2 oz. trace and copper pad with solder 23.5 °C/W Thermal resistance junction-to-case, θjc 2 oz. trace and copper pad without solder 0.32 °C/W Thermal resistance junction-to-ambient, θja 2 oz. trace and copper pad without solder 44.3 °C/W † One of the most influential components on the thermal performance of a package is board design. In order to take full advantage of the heat dissipating abilities of the PowerPAD packages, a board must be used that acts similar to a heat sink and allows for the use of the exposed (and solderable), deep downset pad. See Appendix A of the PowerPAD Thermally Enhanced Package application note, TI literature number SLMA002 and the Thermal Design of the PowerPad PCB Layout section of the System Design Considerations for True Digital Audio Power Amplifiers application note, TI literature number SLAA117. RL = 4 Ω to 8 Ω PARAMETER MIN NOM MAX UNIT Digital DVDD to DVSS 3 3.3 3.6 V PVDDA2 to PVSS 16.5 26.5 28 Supply voltage Regulator PVDDB2 to PVSS 16.5 26.5 28 V yg Regulator PVDDA2 to PVSS} 10.5 16.5 V PVDDB2 to PVSS} 10.5 16.5 † If PVDD is greater than 26.5 V, 15 Watts per channel is still the maximum specified continuous output power. ‡ If using a PVVD power supply less than 16.5 V, connect LDROUTA to PVDDA2 and connect LDROUTB to PVDDB2. Under this condition H-Bridge forward on-state resistance is increased. This will increase internal power dissipation. Maximum output power may need to be reduced to meet thermal conditions. maximum available power at common load impedance for DAP package unclipped (0 dB) level LOAD IMPEDANCE ( Ω) PVDAA1/PVDDB1 (VDC) APPROXIMATE MAX OUTPUT POWER (W) THD+N AT MAX POWER AND 1 kHz INPUT† 4 26.5 15 < 0.1% 6 27 12.85 < 0.09% 8 27 9.64 < 0.09% † Dependent on board design and component selection. |
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