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SN74LVC16374ADL Datasheet(PDF) 1 Page - Texas Instruments |
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SN74LVC16374ADL Datasheet(HTML) 1 Page - Texas Instruments |
1 / 17 page www.ti.com FEATURES DESCRIPTION/ORDERING INFORMATION DGG, DGV, OR DL PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 1OE 1Q1 1Q2 GND 1Q3 1Q4 VCC 1Q5 1Q6 GND 1Q7 1Q8 2Q1 2Q2 GND 2Q3 2Q4 VCC 2Q5 2Q6 GND 2Q7 2Q8 2OE 1CLK 1D1 1D2 GND 1D3 1D4 VCC 1D5 1D6 GND 1D7 1D8 2D1 2D2 GND 2D3 2D4 VCC 2D5 2D6 GND 2D7 2D8 2CLK SN74LVC16374A 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS SCAS728A – OCTOBER 2003 – REVISED OCTOBER 2005 • Member of the Texas Instruments Widebus™ Family • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C • Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C • Ioff Supports Partial-Power-Down Mode Operation • Supports Mixed-Mode Signal Operation on All Ports (5-V Input and Output Voltages With 3.3-V VCC) • Latch-Up Performance Exceeds 250 mA Per JESD 17 • ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 1000-V Charged-Device Model (C101) This 16-bit edge-triggered D-type flip-flop is designed for 1.65-V to 3.6-V VCC operation. The SN74LVC16374A is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The device can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock (CLK) input, the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. ORDERING INFORMATION TA PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING FBGA – GRD SN74LVC16374AGRDR Tape and reel LD374A FBGA – ZRD (Pb-free) SN74LVC16374AZRDR Tube SN74LVC16374ADL SSOP – DL LVC16374A Tape and reel SN74LVC16374ADLR SN74LVC16374ADGGR –40 °C to 85°C TSSOP – DGG Tape and reel LVC16374A 74LVC16374ADGGRG4 SN74LVC16374ADGVR TVSOP – DGV Tape and reel LD374A 74LVC16374ADGVRE4 VFBGA – GQL SN74LVC16374AGQLR Tape and reel LD374A VFBGA – ZQL (Pb-free) SN74LVC16374AZQLR (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright © 2003–2005, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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