Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

HM62864 Datasheet(PDF) 10 Page - List of Unclassifed Manufacturers

Part No. HM62864
Description  65536-word ´ 8-bit High Speed CMOS Static RAM
Download  15 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ETC [List of Unclassifed Manufacturers]
Direct Link  
Logo ETC - List of Unclassifed Manufacturers

HM62864 Datasheet(HTML) 10 Page - List of Unclassifed Manufacturers

Back Button HM62864 Datasheet HTML 6Page - List of Unclassifed Manufacturers HM62864 Datasheet HTML 7Page - List of Unclassifed Manufacturers HM62864 Datasheet HTML 8Page - List of Unclassifed Manufacturers HM62864 Datasheet HTML 9Page - List of Unclassifed Manufacturers HM62864 Datasheet HTML 10Page - List of Unclassifed Manufacturers HM62864 Datasheet HTML 11Page - List of Unclassifed Manufacturers HM62864 Datasheet HTML 12Page - List of Unclassifed Manufacturers HM62864 Datasheet HTML 13Page - List of Unclassifed Manufacturers HM62864 Datasheet HTML 14Page - List of Unclassifed Manufacturers Next Button
Zoom Inzoom in Zoom Outzoom out
 10 / 15 page
background image
HM62864 Series
10
Write Cycle
HM62864-5
HM62864-7
HM62864-8
Parameter
Symbol Min
Max
Min
Max
Min
Max
Unit
Notes
Write cycle time
t
WC
55
70
85
ns
Chip selection to end of write
t
CW
50
60
75
ns
4
Address setup time
t
AS
0
0
0
ns
5
Address valid to end of write
t
AW
50
60
75
ns
Write pulse width
t
WP
40
50
55
ns
3, 8
Write recovery time
t
WR
0
0
0
ns
6
Write to output in high-Z
t
WHZ
0
20
0
25
0
30
ns
1, 2, 7
Data to write time overlap
t
DW
30
30
35
ns
Data hold from write time
t
DH
0
0
0
ns
Output active from end of write
t
OW
5
5
5
ns
2
Output disable to output in high-Z
t
OHZ
0
20
0
25
0
30
ns
1, 2, 7
Notes: 1. t
WHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions
and are not referred to output voltage levels.
2. This parameter is sampled and not 100% tested.
3. A write occurs during the overlap of a low
CS1, a high CS2 and a low WE. A write begins at
the latest transition among
CS1 going low, CS2 going high, and WE going low. A write ends at
the earliest transition among
CS1 going high, CS2 going low, and WE going high. t
WP is
measured from the beginning of write to the end of write.
4. t
CW is measured from the later of CS1 going low or CS2 going high to the end of write.
5. t
AS is measured from the address valid to the beginning of write.
6. t
WR is measured from the earliest of CS1 or WE going high or CS2 going low to the end of write
cycle.
7. During this period, I/O pin are in the output state; therefore, the input signals of the opposite
phase to the outputs must not be applied.
8. In the write cycle with
OE low fixed, t
WP must satisfy the following equation to avoid a problem
of data bus contention, t
WP ≥ tWHZ max + tDW min.


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15 


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn