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LP8860JQVFPRQ1 Datasheet(PDF) 2 Page - Texas Instruments |
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LP8860JQVFPRQ1 Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 110 page  2 LP8860-Q1 SNVSA21F – MAY 2014 – REVISED JULY 2017 www.ti.com Product Folder Links: LP8860-Q1 Submit Documentation Feedback Copyright © 2014–2017, Texas Instruments Incorporated Table of Contents 1 Features .................................................................. 1 2 Applications ........................................................... 1 3 Description ............................................................. 1 4 Revision History..................................................... 2 5 Device Comparison Table..................................... 4 6 Pin Configuration and Functions ......................... 5 7 Specifications......................................................... 7 7.1 Absolute Maximum Ratings ...................................... 7 7.2 ESD Ratings.............................................................. 7 7.3 Recommended Operating Conditions ....................... 7 7.4 Thermal Information .................................................. 8 7.5 Electrical Characteristics .......................................... 8 7.6 Current Sinks Electrical Characteristics.................... 8 7.7 Boost Converter Characteristics ............................... 9 7.8 Logic Interface Characteristics................................ 10 7.9 VIN Undervoltage Protection (VIN_UVLO) .............. 10 7.10 VDD Undervoltage Protection (VDD_UVLO) ......... 11 7.11 VIN Overvoltage Protection (VIN_OVP) ............... 11 7.12 VIN Overcurrent Protection (VIN_OCP) ............... 11 7.13 Power-Line FET Control Electrical Characteristics ......................................................... 11 7.14 External Temp Sensor Control Electrical Characteristics ......................................................... 11 7.15 I2C Serial Bus Timing Parameters (SDA, SCLK) . 13 7.16 SPI Timing Requirements ..................................... 13 7.17 Typical Characteristics .......................................... 14 8 Detailed Description ............................................ 15 8.1 Overview ................................................................. 15 8.2 Functional Block Diagram ....................................... 18 8.3 Feature Description................................................. 19 8.4 Device Functional Modes........................................ 49 8.5 Programming........................................................... 50 8.6 Register Maps ......................................................... 56 9 Application and Implementation ........................ 86 9.1 Application Information............................................ 86 9.2 Typical Applications ................................................ 86 10 Power Supply Recommendations ................... 100 11 Layout................................................................. 101 11.1 Layout Guidelines ............................................... 101 11.2 Layout Example .................................................. 102 12 Device and Documentation Support ............... 103 12.1 Device Support.................................................... 103 12.2 Documentation Support ...................................... 103 12.3 Receiving Notification of Documentation Updates.................................................................. 103 12.4 Community Resources........................................ 103 12.5 Trademarks ......................................................... 103 12.6 Electrostatic Discharge Caution .......................... 103 12.7 Glossary .............................................................. 103 13 Mechanical, Packaging, and Orderable Information ......................................................... 103 4 Revision History Changes from Revision E (November 2016) to Revision F Page • Changed placement of "7" data hold time in Figure 2 ......................................................................................................... 13 • Deleted "The LP8860-Q1 doesn’t support incremental addressing." after Table 19 ........................................................... 52 • Changed "short" to "open" in DRV_HEADER[2:0] row, EEPROM Register 4 ..................................................................... 71 Changes from Revision D (September 2016) to Revision E Page • Deleted 4-A row from VOCP in VIN Overcurrent Protection (VIN_OCP) table........................................................................ 11 • Changed "+ 150 mA" to "× 150 mA" in eq. 8 ...................................................................................................................... 42 • Deleted "01/4A" row from Input voltage overcurrent protection in Table 16 ........................................................................ 44 • Deleted duplicate of Figure 42 "State Diagram" .................................................................................................................. 49 • Changed "open" to "short" in DRV_LED_FAULT_THR[1:0] row, EEPROM Register 4 ...................................................... 71 • Changed "nit" to "not" - correct typo..................................................................................................................................... 72 • Deleted "01 = 4 A" from PL_SD_LEVEL[1:0] in EEPROM Register 10 ............................................................................... 76 • Updated orderable options in POA .................................................................................................................................... 103 • Added pre-prod "R" orderable option in POA .................................................................................................................... 103 |
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