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LM339-MIL Datasheet(PDF) 4 Page - Texas Instruments |
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LM339-MIL Datasheet(HTML) 4 Page - Texas Instruments |
4 / 23 page 4 LM339-MIL SNOSD54 – JUNE 2017 www.ti.com Product Folder Links: LM339-MIL Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) Refer to RETS139X for military specifications. (3) Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode range, the comparator will provide a proper output state. The low input voltage state must not be less than −0.3 VDC (or 0.3 VDC below the magnitude of the negative power supply, if used) (at 25°C). (4) This input current will only exist when the voltage at any of the input leads is driven negative. It is because of the collector-base junction of the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the comparators to go to the V+ voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative. This is not destructive and normal output states will re-establish when the input voltage, which was negative, again returns to a value greater than −0.3 VDC (at 25°C). (5) For operating at high temperatures, the device must be derated based on a 125°C maximum junction temperature and a thermal resistance of 95°C/W which applies for the device soldered in a printed circuit board, operating in a still air ambient. The low bias dissipation and the ON-OFF characteristic of the outputs keeps the chip dissipation very small (PD ≤ 100 mW), provided the output transistors are allowed to saturate. (6) Short circuits from the output to V+ can cause excessive heating and eventual destruction. When considering short circuits to ground, the maximum output current is approximately 20 mA independent of the magnitude of V+. 6 Specifications 6.1 Absolute Maximum Ratings See (1) (2) MIN MAX UNIT Supply voltage, V+ 36 VDC Differential input voltage(3) 36 Input voltage –0.3 36 Input current (VIN ≤ 0.3 VDC) (4) 50 mA Power dissipation(5) PDIP 1050 mW Cavity DIP 1190 SOIC package 760 Output short-circuit to GND(6) Continuous Storage temperature, Tstg −65 150 °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. 6.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±600 V |
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