Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

PEEL22CV10AZ Datasheet(PDF) 8 Page - Anachip Corp

Part No. PEEL22CV10AZ
Description  CMOS Programmable Electrically Erasable Logic Device
Download  10 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ANACHIP [Anachip Corp]
Direct Link  
Logo ANACHIP - Anachip Corp

PEEL22CV10AZ Datasheet(HTML) 8 Page - Anachip Corp

Back Button PEEL22CV10AZ Datasheet HTML 2Page - Anachip Corp PEEL22CV10AZ Datasheet HTML 3Page - Anachip Corp PEEL22CV10AZ Datasheet HTML 4Page - Anachip Corp PEEL22CV10AZ Datasheet HTML 5Page - Anachip Corp PEEL22CV10AZ Datasheet HTML 6Page - Anachip Corp PEEL22CV10AZ Datasheet HTML 7Page - Anachip Corp PEEL22CV10AZ Datasheet HTML 8Page - Anachip Corp PEEL22CV10AZ Datasheet HTML 9Page - Anachip Corp PEEL22CV10AZ Datasheet HTML 10Page - Anachip Corp  
Zoom Inzoom in Zoom Outzoom out
 8 / 10 page
background image
Anachip Corp.
www.anachip.com.tw
Rev. 1.0 Dec 16, 2004
8/10
Table 10.
Over the operating range 8
-25
Symbol
Parameter
Min
Max
Unit
tPD
Input5 to non-registered output
25
ns
tOE
Input5 to output enable6
25
ns
tOD
Input5 to output disable6
25
ns
tCO1
Clock to Output
15
ns
tCO2
Clock to comb. Output delay via internal registered feedback
35
ns
tCF
Clock to Feedback
9
ns
tSC
Input5 or feedback setup to clock
15
ns
tHC
Input5 hold after clock
0
ns
tCL, tCH
Clock low time, clock high time8
13
ns
tCP
Min clock period Ext (tSC + tCO1)
30
ns
fMAX1
Internal feedback (1/tSC + tCF)
11
41.6
MHz
fMAX2
External feedback (1/tCP)
11
33.3
MHz
fMAX3
No feedback (1/tCL+tCH)
11
38.4
MHz
tAW
Asynchronous Reset Pulse Width
25
ns
tAP
Input to Asynchronous Reset
25
ns
tAR
Asynchronous Reset recovery time
25
ns
tRESET
Power-on reset time for registers in clear state12
5
µs
Switching Waveforms
Inputs, I/O,
Registered Feedback,
Synchronous Preset
Clock
Asynchronous
Reset
Registered
Outputs
Combinatorial
Outputs
Notes:
1. Minimum DC input is -0.5V, however, inputs may undershoot to -2.0V for peri-
ods less than 20 ns.
2. VI and VO are not specified for program/verify operation.
3. Test Points for Clock and VCC in tR and tF are referenced at the 10% and 90%
levels.
4. I/O pins are 0V and VCC.
5. “Input” refers to an input pin signal.
6. tOE is measured from input transition to VREF±0.1V, TOD is measured from
input transition to VOH-0.1V or VOL+0.1V; VREF=VL.
7. Capacitances are tested on a sample basis.
8. Test conditions assume: signal transition times of 3ns or less from the 10% and
90% points, timing reference levels of 1.5V (Unless otherwise specified).
9. Test one output at a time for a duration of less than 1 second.
10. ICC for a typical application: This parameter is tested with the device pro-
grammed as a 10-bit Counter.
11. Parameters are not 100% tested. Specifications are based on initial character-
ization and are tested after any design process modification that might affect oper-
ational frequency.
12. All inputs at GND.


Html Pages

1  2  3  4  5  6  7  8  9  10 


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn