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PCA9500 Datasheet(PDF) 4 Page - NXP Semiconductors

Part No. PCA9500
Description  8-bit I2C and SMBus I/O port with 2-kbit EEPROM
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Maker  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
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PCA9500 Datasheet(HTML) 4 Page - NXP Semiconductors

 
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Philips Semiconductors
Product data sheet
PCA9500
8-bit I2C and SMBus I/O port with 2-kbit EEPROM
2004 Sep 30
4
FUNCTIONAL DESCRIPTION
SW00546
WRITE PULSE
DATA FROM
SHIFT REGISTER
POWER-ON
RESET
READ PULSE
DATA TO
SHIFT REGISTER
VDD
I/O0 TO I/O7
VSS
100
µA
CI
S
DQ
FF
CI
S
DQ
FF
Figure 4. Simplified schematic diagram of each I/O
DEVICE ADDRESSING
Following a START condition the bus master must output the address of the slave it is accessing. The address of the PCA9500 is shown in
Figure 5. Internal pullup resistors are incorporated on the hardware selectable address pins.
R/W
0
1
0
0
A2
A1
A0
0
11
0
A2
A1
A0
a.
b.
(a) I/O EXPANDER
(b) MEMORY
SW01075
SLAVE ADDRESS
SLAVE ADDRESS
FIXED
HARDWARE
PROGRAMMABLE
R/W
FIXED
HARDWARE
PROGRAMMABLE
Figure 5. PCA9500 slave addresses
The last bit of the address byte defines the operation to be performed. When set to logic 1 a read is selected while a logic 0 selects a write
operation.


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