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MK1709 Datasheet(PDF) 2 Page - Integrated Circuit Systems |
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MK1709 Datasheet(HTML) 2 Page - Integrated Circuit Systems |
2 / 9 page Low EMI Clock Generator MDS 1709 D 2 Revision 031204 Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com MK1709 Pin Assignment Spread Percentage and Direction Select Table 0 = connect to GND M = unconnected (floating) has internal Pull up resistor to VDD and is considered as a 1 state 1 = connect directly to VDD ICLK VDD GND S1 CLK S0 LEE S2 1 2 3 4 8 7 6 5 8-pin SOIC (MK1709S) CLK VDD GND S1 ICLK S0 LEE S2 1 2 3 4 8 7 6 5 8-pin TSSOP (MK1709AG) S2 Pin 8 (1709S) Pin 6 (1709AG) S1 Pin 7 (1709S) Pin 5 (1709AG) S0 Pin 6 (1709S) Pin 4 (1709AG) Frequency Range Spread Percentage (%) 0 0 0 40-50 ±0.9 0 0 M 40-50 ±0.7 0 0 1 40-50 (MK1709S) 25-50 (MK1709AG) ±0.8 0 M 0 40-50 (MK1709S) 25-50 (MK1709AG) ±0.6 0 M M 40-50 ±1.1 0 M1 50 -100 ±0.6 0 10 50 -100 ±0.7 0 1M 50 -100 ±0.8 0 1 1 Power Down — 1 00 50 -100 ±0.9 1 0M 50 -100 ±1.1 1 0 1 100-165 ±0.7 1 M 0 100-165 ±0.6 1 M M 100-165 ±1.1 1 M 1 100-165 ±1.35 1 1 0 100-165 ±0.8 1 1 M 100-165 ±0.9 1 1 1 Power Down — |
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