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MAX1177 Datasheet(PDF) 6 Page - Maxim Integrated Products

Part No. MAX1177
Description  16-Bit, 135ksps, Single-Supply ADC with 0 to 10V Input Range
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Maker  MAXIM [Maxim Integrated Products]
Homepage  http://www.maxim-ic.com
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MAX1177 Datasheet(HTML) 6 Page - Maxim Integrated Products

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16-Bit, 135ksps, Single-Supply ADC
with to 10V Input Range
6
_______________________________________________________________________________________
Pin Description
PIN
NAME
FUNCTION
1
D4/D12
Tri-State Digital-Data Output
2
D5/D13
Tri-State Digital-Data Output
3
D6/D14
Tri-State Digital-Data Output
4
D7/D15
Tri-State Digital-Data Output. D15 is the MSB.
5R/
C
Read/Convert Input. Power up and put the device in acquisition mode by holding R/
C low during the
first falling edge of
CS. During the second falling edge of CS, the level on R/C determines whether the
reference and reference buffer power down or remain on after conversion. Set R/
C high during the
second falling edge of
CS to power down the reference and buffer, or set R/C low to leave the
reference and buffer powered up. Set R/
C high during the third falling edge of CS to put valid data on
the bus.
6
EOC
End of Conversion.
EOC drives low when conversion is complete.
7AVDD
Analog Supply Input. Bypass with a 0.1µF capacitor to AGND.
8
AGND
Analog Ground. Primary analog ground (star ground).
9
AIN
Analog Input
10
AGND
Analog Ground. Connect pin 10 to pin 8.
11
REFADJ
Reference Buffer Output. Bypass REFADJ with a 0.1µF capacitor to AGND for internal reference
mode. Connect REFADJ to AVDD to select external reference mode.
12
REF
Reference Input/Output. Bypass REF with a 10µF capacitor to AGND for internal reference mode.
External reference input when in external reference mode.
13
HBEN
High-Byte Enable Input. Used to multiplex the 16-bit conversion result.
1: MSB available on the data bus.
0: LSB available on the data bus.
14
CS
Convert Start. The first falling edge of
CS powers up the device and enables acquire mode when R/C
is low. The second falling edge of
CS starts the conversion. The third falling edge of CS loads the
result onto the bus when R/
C is high.
15
DGND
Digital Ground
16
DVDD
Digital Supply Voltage. Bypass with a 0.1µF capacitor to DGND.
17
D0/D8
Tri-State Digital-Data Output. D0 is the LSB.
18
D1/D9
Tri-State Digital-Data Output
19
D2/D10
Tri-State Digital-Data Output
20
D3/D11
Tri-State Digital-Data Output


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