RS5C372A-E2-F datasheet(43/57 Pages) RICOH | I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC

Part No.	RS5C372A-E2-F

Description	I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC

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Manufacturer	RICOH [RICOH electronics devices division]

Direct Link	http://www.ricoh.com

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RS5C372A/B

42

4.1-1 Control of the INTRA , INTRB Output (flag bit, enable bit, interrupt output select bit)

(RS5C372A)

Of the three output wave forms listed above, interrupt output conditions may be set by setting the flag bit that

monitors output state on the register, the enable bit that enables an output wave form and the output select bit

that selects either INTRA or INTRB to be output a wave form to.

Flag bit

Enable bit

Interrupt output select bit (SL2, SL1)

Enable bit (D5, D4 at Eh)

(0,0)

(0,1)

(1,0)

(1,1)

Alarm_A

AAFG (D1 at Fh)

AALE (D7 at Eh)

INTRA

Alarm_B

BAFG (D0 at Fh)

BALE (D6 at Eh)

INTRA

INTRB

INTRA

INTRB

Periodic

interrupt

CTFG (D2 at Fh)

Disabled at CT2

CT1CT00

(D2 to D0 at Eh)

INTRA

INTRB

32-kHz clock

output

No

CLEN (D3 at Fh)

INTRB

 When power ON (XSTP1) since AALEBALECT

2

CT1CT0 CLEN SL2SL10,

INTRA

OFF (“H”).

32-kHz clock pulses are output from the INTRB pin.

 When more than one output wave forms are output from a single output pin, the output will have OR wave form

of negative logic of both.

Example: When Alarm_A and Alarm_B are output from the INTRA pin.

Alarm_A

Alarm_B

INTRA

In such a case which output wave form is output from the pin may be confirmed by reading

the flag register.

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