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MSP430FR2111IRLLR Datasheet(PDF) 60 Page - Texas Instruments |
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MSP430FR2111IRLLR Datasheet(HTML) 60 Page - Texas Instruments |
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60 / 78 page  1 3 5 7 9 11 13 2 4 6 8 10 12 14 TDO/TDI TDI TMS TCK GND TEST JTAG VCC TOOL VCC TARGET J1 (see Note A) J2 (see Note A) V CC R1 47 kW DVCC RST/NMI/SBWTDIO TDO/TDI TDI TMS TCK TEST/SBWTCK DVSS MSP430FRxxx C1 1 nF (see Note B) RST Important to connect Copyright © 2016, Texas Instruments Incorporated 60 MSP430FR2111, MSP430FR2110, MSP430FR2100, MSP430FR2000 SLASE78B – AUGUST 2016 – REVISED JULY 2017 www.ti.com Submit Documentation Feedback Product Folder Links: MSP430FR2111 MSP430FR2110 MSP430FR2100 MSP430FR2000 Applications, Implementation, and Layout Copyright © 2016–2017, Texas Instruments Incorporated 7.1.3 JTAG With the proper connections, the debugger and a hardware JTAG interface (such as the MSP-FET or MSP-FET430UIF) can be used to program and debug code on the target board. In addition, the connections also support the MSP-GANG production programmers, thus providing an easy way to program prototype boards, if desired. Figure 7-3 shows the connections between the 14-pin JTAG connector and the target device required to support in-system programming and debugging for 4-wire JTAG communication. Figure 7-4 shows the connections for 2-wire JTAG mode (Spy-Bi-Wire). The connections for the MSP-FET and MSP-FET430UIF interface modules and the MSP-GANG are identical. Both can supply VCC to the target board (through pin 2). In addition, the MSP-FET and MSP- FET430UIF interface modules and MSP-GANG have a VCC sense feature that, if used, requires an alternate connection (pin 4 instead of pin 2). The VCC-sense feature senses the local VCC present on the target board (that is, a battery or other local power supply) and adjusts the output signals accordingly. Figure 7-3 and Figure 7-4 show a jumper block that supports both scenarios of supplying VCC to the target board. If this flexibility is not required, the desired VCC connections may be hardwired to eliminate the jumper block. Pins 2 and 4 must not be connected at the same time. For additional design information regarding the JTAG interface, see the MSP430 Hardware Tools User’s Guide. A. If a local target power supply is used, make connection J1. If power from the debug or programming adapter is used, make connection J2. B. The upper limit for C1 is 1.1 nF when using current TI tools. Figure 7-3. Signal Connections for 4-Wire JTAG Communication |
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